公开(公告)号：US10552934B2

公开(公告)日：2020-02-04

申请号：US15201163

申请日：2016-07-01

Applicant: Intel Corporation

Inventor： Michael Apodaca ,  David M. Cimini ,  Thomas F. Raoux ,  Somnath Ghosh ,  Uddipan Mukherjee ,  Debraj Bose ,  Sthiti Deka ,  Yohai Gevim

IPC: G06T1/20 ,  G06T15/80 ,  G06T1/60 ,  G06F12/0886 ,  G06F12/0855 ,  G06F12/084 ,  G06F12/0831 ,  G06F12/0811 ,  G06F12/0804 ,  G06F9/30 ,  G06F12/00

Abstract: Methods and apparatus relating to reducing memory latency in graphics operations are described. In an embodiment, uniform data is transferred from a buffer to a General Register File (GRF) of a processor based at least in part on information stored in a gather table. The uniform data comprises data that is uniform across a plurality of primitives in a graphics operation. Other embodiments are also disclosed and claimed.

公开(公告)号：US20180005345A1

公开(公告)日：2018-01-04

申请号：US15201163

申请日：2016-07-01

Applicant: Intel Corporation

Inventor： Michael Apodaca ,  David M. Cimini ,  Thomas F. Raoux ,  Somnath Ghosh ,  Uddipan Mukherjee ,  Debraj Bose ,  Sthiti Deka ,  Yohai Gevim

IPC: G06T1/20 ,  G06T15/80

Abstract: Methods and apparatus relating to reducing memory latency in graphics operations are described. In an embodiment, uniform data is transferred from a buffer to a General Register File (GRF) of a processor based at least in part on information stored in a gather table. The uniform data comprises data that is uniform across a plurality of primitives in a graphics operation. Other embodiments are also disclosed and claimed.