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公开(公告)号:US20230102219A1
公开(公告)日:2023-03-30
申请号:US17478720
申请日:2021-09-17
Applicant: Intel Corporation
Inventor: Arnab Sen Gupta , Matthew V. Metz , Hui Jae Yoo , Justin R. Weber , Van H. Le , Jason C. Retasket , Abhishek A. Sharma , Noriyuki Sato , Yu-Jin Chen , Eric Mattson , Edward O. Johnson, JR.
IPC: H01L29/45 , H01L29/786 , H01L29/78 , H01L29/66 , H01L27/108 , H01L29/417
Abstract: Described herein are integrated circuit devices with metal-oxide semiconductor channels and carbon source and drain (S/D) contacts. S/D contacts conduct current to and from the semiconductor devices, e.g., to the source and drain regions of a transistor. Carbon S/D contacts may be particularly useful with semiconductor devices that use certain channel materials, such as indium gallium zinc oxide.
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公开(公告)号:US12183739B2
公开(公告)日:2024-12-31
申请号:US17127280
申请日:2020-12-18
Applicant: Intel Corporation
Inventor: Nicole Thomas , Eric Mattson , Sudarat Lee , Scott B. Clendenning , Tobias Brown-Heft , I-Cheng Tung , Thoe Michaelos , Gilbert Dewey , Charles Kuo , Matthew Metz , Marko Radosavljevic , Charles Mokhtarzadeh
IPC: H01L27/092 , H01L21/02 , H01L21/28 , H01L21/8238 , H01L29/06 , H01L29/423 , H01L29/49 , H01L29/66 , H01L29/78 , H01L29/786
Abstract: Integrated circuitry comprising a ribbon or wire (RoW) transistor stack within which the transistors have different threshold voltages (Vt). In some examples, a gate electrode of the transistor stack may include only one workfunction metal. A metal oxide may be deposited around one or more channels of the transistor stack as a solid-state source of a metal oxide species that will diffuse toward the channel region(s). As diffused, the metal oxide may remain (e.g., as a silicate, or hafnate) in close proximity to the channel region, thereby altering the dipole properties of the gate insulator material. Different channels of a transistor stack may be exposed to differing amounts or types of the metal oxide species to provide a range of Vt within the stack. After diffusion, the metal oxide may be stripped as sacrificial, or retained.
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公开(公告)号:US20220199620A1
公开(公告)日:2022-06-23
申请号:US17127280
申请日:2020-12-18
Applicant: Intel Corporation
Inventor: Nicole Thomas , Eric Mattson , Sudarat Lee , Scott B. Clendenning , Tobias Brown-Heft , I-Cheng Tung , Thoe Michaelos , Gilbert Dewey , Charles Kuo , Matthew Metz , Marko Radosavljevic , Charles Mokhtarzadeh
IPC: H01L27/092 , H01L29/06 , H01L29/423 , H01L29/49 , H01L29/78 , H01L29/786 , H01L21/02 , H01L21/28 , H01L21/8238 , H01L29/66
Abstract: Integrated circuitry comprising a ribbon or wire (RoW) transistor stack within which the transistors have different threshold voltages (Vt). In some examples, a gate electrode of the transistor stack may include only one workfunction metal. A metal oxide may be deposited around one or more channels of the transistor stack as a solid-state source of a metal oxide species that will diffuse toward the channel region(s). As diffused, the metal oxide may remain (e.g., as a silicate, or hafnate) in close proximity to the channel region, thereby altering the dipole properties of the gate insulator material. Different channels of a transistor stack may be exposed to differing amounts or types of the metal oxide species to provide a range of Vt within the stack. After diffusion, the metal oxide may be stripped as sacrificial, or retained.
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公开(公告)号:US20250133822A1
公开(公告)日:2025-04-24
申请号:US19001219
申请日:2024-12-24
Applicant: Intel Corporation
Inventor: Nicole Thomas , Eric Mattson , Sudarat Lee , Scott B. Clendenning , Tobias Brown-Heft , I-Cheng Tung , Thoe Michaelos , Gilbert Dewey , Charles Kuo , Matthew Metz , Marko Radosavljevic , Charles Mokhtarzadeh
IPC: H10D84/85 , H01L21/02 , H01L21/28 , H10D30/01 , H10D30/67 , H10D30/69 , H10D62/10 , H10D84/01 , H10D84/03
Abstract: Integrated circuitry comprising a ribbon or wire (RoW) transistor stack within which the transistors have different threshold voltages (Vt). In some examples, a gate electrode of the transistor stack may include only one workfunction metal. A metal oxide may be deposited around one or more channels of the transistor stack as a solid-state source of a metal oxide species that will diffuse toward the channel region(s). As diffused, the metal oxide may remain (e.g., as a silicate, or hafnate) in close proximity to the channel region, thereby altering the dipole properties of the gate insulator material. Different channels of a transistor stack may be exposed to differing amounts or types of the metal oxide species to provide a range of Vt within the stack. After diffusion, the metal oxide may be stripped as sacrificial, or retained.
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公开(公告)号:US20240201586A1
公开(公告)日:2024-06-20
申请号:US18068732
申请日:2022-12-20
Applicant: Intel Corporation
Inventor: James Blackwell , Charles Cameron Mokhtarzadeh , Lauren Elizabeth Doyle , Eric Mattson , Patrick Theofanis , John J. Plombon , Michael Robinson , Marie Krysak , Paul Meza-Morales , Scott Semproni , Scott B. Clendenning
CPC classification number: G03F7/0042 , G03F7/038 , G03F7/167 , G03F7/2004 , G03F7/38
Abstract: Precursors and methods related to a tin-based photoresist are disclosed herein. In some embodiments, a method for forming a tin-based photoresist may include exposing a tin-containing precursor and a co-reagent to a substrate to form a photoresist having tin clusters; selectively exposing the photoresist to extreme ultraviolet radiation (EUV); and exposing the photoresist to heat to form, in the region, crosslinking between the tin clusters. In some embodiments, the precursor has a formula R1R2Sn(N(CH3)2)2, and R1 and R2 are selected from the group consisting of neo-silyl, neo-pentyl, phenyl, benzyl, methyl-bis(trimethylsilyl), methyl, ethyl, isopropyl, tert-butyl, n-butyl, N,N-dimethylpropylamine, and N, N-dimethlybutylamine. In other embodiments, the precursor includes a chelating alkyl-amine or alkyl-amide ligand featuring a 5 membered or 6 membered tin-based heterocycle bound κ2-C,N with an alkyl group on the ligand backbone, wherein the alkyl group includes methyl, ethyl, vinyl, hydrogen, or tert-butyl.
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公开(公告)号:US20230197728A1
公开(公告)日:2023-06-22
申请号:US17554791
申请日:2021-12-17
Applicant: Intel Corporation
Inventor: Nicole K. Thomas , Eric Mattson , Sudarat Lee , Sarah Atanasov , Christopher J. Jezewski , Charles Mokhtarzadeh , Thoe Michaelos , I-Cheng Tung , Charles C. Kuo , Scott B. Clendenning , Matthew V. Metz
IPC: H01L27/092 , H01L29/06 , H01L29/417 , H01L29/78
CPC classification number: H01L27/0924 , H01L29/0669 , H01L29/41791 , H01L29/785 , H01L2029/7858
Abstract: An integrated circuit includes a lower and upper device portions including bodies of semiconductor material extending horizontally between first source and drain regions in a spaced-apart vertical stack. A first gate structure is around a body in the lower device portion and includes a first gate electrode and a first gate dielectric. A second gate structure is around a body in the upper device portion and includes a second gate electrode and a second gate dielectric, where the first gate dielectric is compositionally distinct from the second gate dielectric. In some embodiments, a dipole species has a first concentration in the first gate dielectric and a different second concentration in the second gate dielectric. A method of fabrication is also disclosed.
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