公开(公告)号：US20240204103A1

公开(公告)日：2024-06-20

申请号：US18065657

申请日：2022-12-14

Applicant: Intel Corporation

Inventor： Rohit Galatage ,  Cheng-Ying Huang ,  Dan S. Lavric ,  Sarah Atanasov ,  Shao Ming Koh ,  Jack T. Kavalieros ,  Marko Radosavljevic ,  Mauro J. Kobrinsky ,  Jami Wiedemer ,  Munzarin Qayyum ,  Evan Clinton

IPC: H01L29/78 ,  H01L29/06 ,  H01L29/423 ,  H01L29/49

CPC classification number: H01L29/785 ,  H01L29/0669 ,  H01L29/42392 ,  H01L29/49 ,  H01L2029/7858

Abstract: Disclosed herein are transistor gate-channel arrangements with transistor gate stacks that include multiple dipole materials, and related methods and devices. For example, in some embodiments, a transistor gate-channel arrangement may include a channel material and a transistor gate stack. The transistor gate stack may include a gate electrode material and a gate dielectric material between the gate electrode material and the channel material, where the gate dielectric material includes a first dipole material and a second dipole material where one of the first and second dipole materials is a P-shifter dipole material and the other one is an N-shifter dipole material.

公开(公告)号：US20240204060A1

公开(公告)日：2024-06-20

申请号：US18065660

申请日：2022-12-14

Applicant: Intel Corporation

Inventor： Rohit Galatage ,  Cheng-Ying Huang ,  Jack T. Kavalieros ,  Marko Radosavljevic ,  Mauro J. Kobrinsky ,  Jami Wiedemer ,  Munzarin Qayyum ,  Evan Clinton

IPC: H01L29/40 ,  H01L29/423 ,  H01L29/66 ,  H01L29/775

CPC classification number: H01L29/401 ,  H01L29/42392 ,  H01L29/66439 ,  H01L29/6653 ,  H01L29/66742 ,  H01L29/775 ,  H01L2029/42388

Abstract: IC structures with nanoribbon stacks without dielectric protection caps for top nanoribbons, and associated methods and devices, are disclosed. An example IC structure includes a stack of nanoribbons, an opening over the top nanoribbon of the stack of nanoribbons, and a gate electrode material in the opening, where the opening has a first portion, a second portion, and a third portion, the second portion is between the first portion and the third portion, and where a width of a portion of the gate electrode material in the second portion is smaller than a width of a portion of the gate electrode material in the first portion. In such an IC structure, a gate insulator on the sidewalls of the first portion of the opening is materially discontinuous from a gate insulator on the sidewalls of the third portion of the opening.