公开(公告)号：US20210217235A1

公开(公告)日：2021-07-15

申请号：US17154174

申请日：2021-01-21

Applicant: Intel Corporation

Inventor： Justin DeCell ,  Saurabh Sharma ,  Subramaniam Maiyuran ,  Raghavendra Miyar ,  Jorge Garcia Pabon

IPC: G06T17/10 ,  G06T17/20 ,  G06T1/20 ,  G06T15/00

Abstract: Methods, systems and apparatuses may provide for technology that determines the size of a graphics primitive, renders pixels associated with the graphics primitive on a per tile basis if the size exceeds a threshold, and renders the pixels associated with the graphics primitive in a mesh order if the size does not exceed the threshold. In one example, the technology discards state data associated with the graphics primitive in response to a completion of rendering the pixels associated with the graphics primitive in the mesh order.

公开(公告)号：US11204801B2

公开(公告)日：2021-12-21

申请号：US16684077

申请日：2019-11-14

Applicant: Intel Corporation

Inventor： Justin DeCell ,  Saurabh Sharma

IPC: G06F9/48 ,  G06F9/52 ,  G06T15/80 ,  G06F12/0802 ,  G06F9/38 ,  G06F9/30 ,  G06F9/50 ,  G06T15/00

Abstract: Systems and methods for scheduling thread order to improve cache efficiency are disclosed. In one embodiment, a graphics processor includes processing resources and schedule and dispatch logic to schedule and dispatch threads to the processing resources. The schedule and dispatch logic is configured to receive threads, to schedule and dispatch the threads based on a forward thread dispatch having a forward thread order, and to determine whether to disable a reversing of a thread order upon completion of at least a portion of the forward thread dispatch including a completion or ending of a draw call or a dispatch.

公开(公告)号：US20220148261A1

公开(公告)日：2022-05-12

申请号：US17526462

申请日：2021-11-15

Applicant: Intel Corporation

Inventor： Justin DeCell ,  Saurabh Sharma ,  Subramaniam Maiyuran ,  Raghavendra Miyar ,  Jorge Garcia Pabon

IPC: G06T17/10 ,  G06T17/20 ,  G06T1/20 ,  G06T15/00

Abstract: Methods, systems and apparatuses may provide for technology that determines the size of a graphics primitive, renders pixels associated with the graphics primitive on a per tile basis if the size exceeds a threshold, and renders the pixels associated with the graphics primitive in a mesh order if the size does not exceed the threshold. In one example, the technology discards state data associated with the graphics primitive in response to a completion of rendering the pixels associated with the graphics primitive in the mesh order.

公开(公告)号：US20210149716A1

公开(公告)日：2021-05-20

申请号：US16684077

申请日：2019-11-14

Applicant: Intel Corporation

Inventor： Justin DeCell ,  Saurabh Sharma

IPC: G06F9/48 ,  G06F9/30 ,  G06F9/38 ,  G06F12/0802

Abstract: Systems and methods for scheduling thread order to improve cache efficiency are disclosed. In one embodiment, a graphics processor includes processing resources and schedule and dispatch logic to schedule and dispatch threads to the processing resources. The schedule and dispatch logic is configured to receive threads, to schedule and dispatch the threads based on a forward thread dispatch having a forward thread order, and to determine whether to disable a reversing of a thread order upon completion of at least a portion of the forward thread dispatch including a completion or ending of a draw call or a dispatch.

公开(公告)号：US10916052B2

公开(公告)日：2021-02-09

申请号：US16395717

申请日：2019-04-26

Applicant: Intel Corporation

Inventor： Justin DeCell ,  Saurabh Sharma ,  Subramaniam Maiyuran ,  Raghavendra Miyar ,  Jorge Garcia Pabon

IPC: G06T17/10 ,  G06T17/20 ,  G06T1/20 ,  G06T15/00

Abstract: Methods, systems and apparatuses may provide for technology that determines the size of a graphics primitive, renders pixels associated with the graphics primitive on a per tile basis if the size exceeds a threshold, and renders the pixels associated with the graphics primitive in a mesh order if the size does not exceed the threshold. In one example, the technology discards state data associated with the graphics primitive in response to a completion of rendering the pixels associated with the graphics primitive in the mesh order.

公开(公告)号：US11640693B2

公开(公告)日：2023-05-02

申请号：US17526462

申请日：2021-11-15

Applicant: Intel Corporation

Inventor： Justin DeCell ,  Saurabh Sharma ,  Subramaniam Maiyuran ,  Raghavendra Miyar ,  Jorge Garcia Pabon

IPC: G06T17/10 ,  G06T17/20 ,  G06T1/20 ,  G06T15/00

Abstract: Methods, systems and apparatuses may provide for technology that determines the size of a graphics primitive, renders pixels associated with the graphics primitive on a per tile basis if the size exceeds a threshold, and renders the pixels associated with the graphics primitive in a mesh order if the size does not exceed the threshold. In one example, the technology discards state data associated with the graphics primitive in response to a completion of rendering the pixels associated with the graphics primitive in the mesh order.

公开(公告)号：US11176736B2

公开(公告)日：2021-11-16

申请号：US17154174

申请日：2021-01-21

Applicant: Intel Corporation

Inventor： Justin DeCell ,  Saurabh Sharma ,  Subramaniam Maiyuran ,  Raghavendra Miyar ,  Jorge Garcia Pabon

IPC: G06T17/10 ,  G06T17/20 ,  G06T1/20 ,  G06T15/00

Abstract: Methods, systems and apparatuses may provide for technology that determines the size of a graphics primitive, renders pixels associated with the graphics primitive on a per tile basis if the size exceeds a threshold, and renders the pixels associated with the graphics primitive in a mesh order if the size does not exceed the threshold. In one example, the technology discards state data associated with the graphics primitive in response to a completion of rendering the pixels associated with the graphics primitive in the mesh order.

公开(公告)号：US20200342662A1

公开(公告)日：2020-10-29

申请号：US16395717

申请日：2019-04-26

Applicant: Intel Corporation

Inventor： Justin DeCell ,  Saurabh Sharma ,  Subramaniam Maiyuran ,  Raghavendra Miyar ,  Jorge Garcia Pabon

IPC: G06T17/10 ,  G06T17/20 ,  G06T15/00 ,  G06T1/20

Abstract: Methods, systems and apparatuses may provide for technology that determines the size of a graphics primitive, renders pixels associated with the graphics primitive on a per tile basis if the size exceeds a threshold, and renders the pixels associated with the graphics primitive in a mesh order if the size does not exceed the threshold. In one example, the technology discards state data associated with the graphics primitive in response to a completion of rendering the pixels associated with the graphics primitive in the mesh order.