公开(公告)号：US20220181289A1

公开(公告)日：2022-06-09

申请号：US17113410

申请日：2020-12-07

Applicant: Intel Corporation

Inventor： Eng Huat Goh ,  Kyle Davidson ,  Min Suet Lim ,  Kevin Byrd ,  James Wade

IPC: H01L23/00 ,  H01L23/13 ,  H01L23/498 ,  H01L23/64 ,  H01L21/56

Abstract: An integrated circuit package may be fabricated by disposing an underfill material between an electronic substrate and an integrated circuit device through an opening in the electronic substrate. In one embodiment, an integrated circuit assembly may include an electronic substrate having a first surface and an opposing second surface, wherein the electronic substrate includes at least one opening extending from the first surface to the second surface. The integrated circuit assembly may further include an integrated circuit device, wherein the integrated circuit device is electrically attached to the electronic substrate with at least one interconnect, and an underfill material may be disposed between the first surface of the electronic substrate and the integrated circuit device, wherein a portion of the underfill material extends into the opening in the electronic substrate.

公开(公告)号：US20250112198A1

公开(公告)日：2025-04-03

申请号：US18375248

申请日：2023-09-29

Applicant: Intel Corporation

Inventor： Pratyasha Mohapatra ,  Kyle Davidson ,  Brian Franco

IPC: H01L23/00

Abstract: An apparatus is provided which comprises: a device surface, wherein the device surface comprises an array of solder contacts, a substrate surface, wherein the substrate surface comprises an array of pads, the array of solder contacts coupled with the array of pads, and a formation of epoxy coupled with the device surface and the substrate surface, wherein the formation of epoxy is entirely within an area of the array of solder contacts. Other embodiments are also disclosed and claimed.