公开(公告)号：US20230148225A1

公开(公告)日：2023-05-11

申请号：US17958211

申请日：2022-09-30

Applicant: Intel Corporation

Inventor： Manu Mathew Thomas ,  Karthik Vaidyanathan ,  Anton Kaplanyan ,  SungYe Kim ,  Gabor Liktor

IPC: G06T5/00 ,  G06K9/62 ,  G06T15/06 ,  G06T3/40 ,  G06T1/20 ,  G06T5/20 ,  G06T3/00

CPC classification number: G06T5/002 ,  G06K9/6232 ,  G06T15/06 ,  G06T3/4046 ,  G06T3/4053 ,  G06T1/20 ,  G06T5/20 ,  G06T3/0093 ,  G06T2210/36

Abstract: Joint denoising and supersampling of graphics data is described. An example of a graphics processor includes multiple processing resources, including a least a first processing resource including a pipeline to perform a supersampling operation; and the pipeline including circuitry to jointly perform denoising and supersampling of received ray tracing input data, the circuitry including first circuitry to receive input data associated with an input block for a neural network, second circuitry to perform operations associated with a feature extraction and kernel prediction network of the neural network, and third circuitry to perform operations associated with a filtering block of the neural network.

公开(公告)号：US20230066626A1

公开(公告)日：2023-03-02

申请号：US17516112

申请日：2021-11-01

Applicant: Intel Corporation

Inventor： SungYe Kim ,  Karthik Vaidyanathan ,  Gabor Liktor ,  Manu Mathew Thomas

IPC: G06T3/40 ,  G06T3/00 ,  G06T15/50 ,  G06T19/20 ,  G06N3/04

Abstract: One embodiment provides a graphics processor comprising a set of processing resources configured to perform a supersampling operation via a mixed precision convolutional neural network, the set of processing resources including circuitry configured to receive, at an input block of a neural network model, history data, velocity data, and current frame data, pre-process the history data, velocity data, and current frame data to generate pre-processed data, provide the pre-processed data to a feature extraction network of the neural network model, process the pre-processed data at the feature extraction network via one or more encoder stages and one or more decoder stages, and generate an output image via an output block of the neural network model via direct reconstruction or kernel prediction.