公开(公告)号：US20200349100A1

公开(公告)日：2020-11-05

申请号：US16936078

申请日：2020-07-22

Applicant: Intel Corporation

Inventor： Thomas M. Slaight ,  Sivakumar Radhakrishnan ,  Mark Schmisseur ,  Pankaj Kumar ,  Saptarshi Mondal ,  Sin S. Tan ,  David C. Lee ,  Marc T. Jones ,  Geetani R. Edirisooriya ,  Bradley A. Burres ,  Brian M. Leitner ,  Kenneth C. Haren ,  Michael T. Klinglesmith ,  Matthew R. Wilcox ,  Eric J. Dahlen

IPC: G06F13/28 ,  G06F12/0866 ,  G06F3/06 ,  G06F11/10 ,  G06F13/10 ,  G06F13/16 ,  G06F13/40 ,  G06F13/42

Abstract: In accordance with embodiments disclosed herein, there are provided methods, systems, mechanisms, techniques, and apparatuses for presentation of direct accessed storage under a logical drive model; for implementing a distributed architecture for cooperative NVM Data protection; data mirroring for consistent SSD latency; for boosting a controller's performance and RAS with DIF support via concurrent RAID processing; for implementing arbitration and resource schemes of a doorbell mechanism, including doorbell arbitration for fairness and prevention of attack congestion; and for implementing multiple interrupt generation using a messaging unit and NTB in a controller through use of an interrupt coalescing scheme.

公开(公告)号：US11449446B2

公开(公告)日：2022-09-20

申请号：US16936078

申请日：2020-07-22

Applicant: Intel Corporation

Inventor： Thomas M. Slaight ,  Sivakumar Radhakrishnan ,  Mark Schmisseur ,  Pankaj Kumar ,  Saptarshi Mondal ,  Sin S. Tan ,  David C. Lee ,  Marc T. Jones ,  Geetani R. Edirisooriya ,  Bradley A. Burres ,  Brian M. Leitner ,  Kenneth C. Haren ,  Michael T. Klinglesmith ,  Matthew R. Wilcox ,  Eric J. Dahlen

IPC: G06F13/40 ,  G06F13/28 ,  G06F12/0866 ,  G06F3/06 ,  G06F11/10 ,  G06F13/16 ,  G06F13/42 ,  G06F13/10

Abstract: In accordance with embodiments disclosed herein, there are provided methods, systems, mechanisms, techniques, and apparatuses for presentation of direct accessed storage under a logical drive model; for implementing a distributed architecture for cooperative NVM Data protection; data mirroring for consistent SSD latency; for boosting a controller's performance and RAS with DIF support via concurrent RAID processing; for implementing arbitration and resource schemes of a doorbell mechanism, including doorbell arbitration for fairness and prevention of attack congestion; and for implementing multiple interrupt generation using a messaging unit and NTB in a controller through use of an interrupt coalescing scheme.

公开(公告)号：US20160335208A1

公开(公告)日：2016-11-17

申请号：US15224006

申请日：2016-07-29

Applicant: Intel Corporation

Inventor： Thomas M. Slaight ,  Sivakumar Radhakrishnan ,  Mark Schmisseur ,  Pankaj Kumar ,  Saptarshi Mondal ,  Sin S. Tan ,  David C. Lee ,  Marc T. Jones ,  Geetani R. Edirisooriya ,  Bradley A. Burres ,  Brian M. Leitner ,  Kenneth C. Haren ,  Michael T. Klinglesmith ,  Matthew R. Wilcox ,  Eric J. Dahlen

IPC: G06F13/28 ,  G06F13/42 ,  G06F13/16 ,  G06F13/40 ,  G06F3/06 ,  G06F13/10

CPC classification number: G06F13/28 ,  G06F3/0607 ,  G06F3/061 ,  G06F3/0613 ,  G06F3/0619 ,  G06F3/0626 ,  G06F3/064 ,  G06F3/0646 ,  G06F3/065 ,  G06F3/0659 ,  G06F3/0661 ,  G06F3/0673 ,  G06F3/0688 ,  G06F3/0689 ,  G06F11/1068 ,  G06F12/0866 ,  G06F13/102 ,  G06F13/1668 ,  G06F13/4068 ,  G06F13/4282 ,  G06F2212/262 ,  G06F2213/0026 ,  G06F2213/0032

Abstract: In accordance with embodiments disclosed herein, there are provided methods, systems, mechanisms, techniques, and apparatuses for presentation of direct accessed storage under a logical drive model; for implementing a distributed architecture for cooperative NVM Data protection; data mirroring for consistent SSD latency; for boosting a controller's performance and RAS with DIF support via concurrent RAID processing; for implementing arbitration and resource schemes of a doorbell mechanism, including doorbell arbitration for fairness and prevention of attack congestion; and for implementing multiple interrupt generation using a messaging unit and NTB in a controller through use of an interrupt coalescing scheme. For instance, there is disclosed a storage apparatus having therein a plurality of NAND (Negated AND) based flash memory components arranged into a plurality of NAND arrays; a NAND controller communicatively interfaced with the plurality of NAND arrays; and block mirroring logic to establish a mirrored copy for each data block written to the storage apparatus, each mirrored copy to be stored within one of plurality of NAND arrays. Other related embodiments are disclosed.

Abstract translation: 根据本文公开的实施例，提供了用于在逻辑驱动器模型下呈现直接访问存储的方法，系统，机制，技术和装置; 实现用于协作NVM数据保护的分布式架构; 数据镜像，以保持一致的SSD延迟; 通过并发RAID处理来提升控制器的性能和支持DIF的RAS; 执行门铃机制的仲裁和资源计划，包括门铃仲裁以公平和防止冲突拥堵; 并且通过使用中断合并方案在控制器中实现使用消息传送单元和NTB的多个中断生成。 例如，公开了一种存储装置，其中具有排列成多个NAND阵列的多个基于NAND（Negated AND）的闪速存储器组件; 与多个NAND阵列通信地对接的NAND控制器; 和块镜像逻辑，以便为写入存储设备的每个数据块建立镜像拷贝，每个镜像拷贝存储在多个NAND阵列之一内。 公开了其他相关实施例。