公开(公告)号：US20230185695A1

公开(公告)日：2023-06-15

申请号：US17551774

申请日：2021-12-15

Applicant: Intel Corporation

Inventor： Markus Metzger ,  Beeman Strong

IPC: G06F11/36

CPC classification number: G06F11/3636

Abstract: An embodiment of an integrated circuit may comprise a processor and circuitry coupled to the processor to generate non-timing packets associated with a trace of an execution of code on the processor, generate timing packets associated with the trace of the execution of the code on the processor, wherein the timing packets include at least a full timestamp timing packet and a periodic timing packet, identify a low density section of the trace of the execution of the code on the processor, and suppress generation of periodic timing packets during the identified low density section of the trace of the execution of the code on the processor. Other embodiments are disclosed and claimed.