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公开(公告)号：US11757647B2
公开(公告)日：2023-09-12
申请号：US17320762
申请日：2021-05-14
Applicant: Intel Corporation
Inventor： Kapil Sood , Naveen Lakkakula , Hari K. Tadepalli , Lokpraveen Mosur , Rajesh Gadiyar , Patrick Fleming
CPC classification number: H04L9/3234 , G06F21/57 , G06F21/602 , G06F21/606 , H04L9/0825 , H04L9/0861 , H04L9/0897 , H04L9/14 , H04L63/20 , H04L2209/122
Abstract: A security accelerator device stores a first credential that is uniquely associated with the individual security accelerator device and represents a root of trust to a trusted entity. The device establishes a cryptographic trust relationship with a client entity that is based on the root of trust, the cryptographic trust relationship being represented by a second credential. The device receives and store a secret credential of the client entity, which is received via communication secured by the second credential. Further, the device executes a cryptographic computation using the secret client credential on behalf of the client entity to produce a computation result.
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公开(公告)号：US12072760B2
公开(公告)日：2024-08-27
申请号：US17133305
申请日：2020-12-23
Applicant: Intel Corporation
Inventor： Andrew Cunningham , Patrick Fleming , Naveen Lakkakula , Richard Guerin , Charitra Sankar , Stephen Doyle , Ralph Castro , John Browne
CPC classification number: G06F11/1004 , G06F9/3005 , G06F9/4494 , G06F9/4881
Abstract: Methods, apparatus, systems and articles of manufacture are disclosed to control execution of tasks in a computing system. The methods, apparatus, systems and articles of manufacture include at least one storage device and at least one processor to, execute instructions to at least obtain a request to perform an inverse operation on a data flow, the data flow previously transformed during a forward operation, determine a first processor core that executed the forward operation, the data flow including an identifier of the first processor core, and transmit the data flow to a second processor core to perform the inverse operation.
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公开(公告)号：US20220021540A1
公开(公告)日：2022-01-20
申请号：US17320762
申请日：2021-05-14
Applicant: Intel Corporation
Inventor： Kapil Sood , Naveen Lakkakula , Hari K. Tadepalli , Lokpraveen Mosur , Rajesh Gadiyar , Patrick Fleming
Abstract: A security accelerator device stores a first credential that is uniquely associated with the individual security accelerator device and represents a root of trust to a trusted entity. The device establishes a cryptographic trust relationship with a client entity that is based on the root of trust, the cryptographic trust relationship being represented by a second credential. The device receives and store a secret credential of the client entity, which is received via communication secured by the second credential. Further, the device executes a cryptographic computation using the secret client credential on behalf of the client entity to produce a computation result.
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公开(公告)号：US11018871B2
公开(公告)日：2021-05-25
申请号：US15941407
申请日：2018-03-30
Applicant: Intel Corporation
Inventor： Kapil Sood , Naveen Lakkakula , Hari K. Tadepalli , Lokpraveen Mosur , Rajesh Gadiyar , Patrick Fleming
Abstract: A security accelerator device stores a first credential that is uniquely associated with the individual security accelerator device and represents a root of trust to a trusted entity. The device establishes a cryptographic trust relationship with a client entity that is based on the root of trust, the cryptographic trust relationship being represented by a second credential. The device receives and store a secret credential of the client entity, which is received via communication secured by the second credential. Further, the device executes a cryptographic computation using the secret client credential on behalf of the client entity to produce a computation result.
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公开(公告)号：US20210117191A1
公开(公告)日：2021-04-22
申请号：US17133305
申请日：2020-12-23
Applicant: Intel Corporation
Inventor： Andrew Cunningham , Patrick Fleming , Naveen Lakkakula , Richard Guerin , Charitra Sankar , Stephen Doyle , Ralph Castro , John Browne
Abstract: Methods, apparatus, systems and articles of manufacture are disclosed to control execution of tasks in a computing system. The methods, apparatus, systems and articles of manufacture include at least one storage device and at least one processor to, execute instructions to at least obtain a request to perform an inverse operation on a data flow, the data flow previously transformed during a forward operation, determine a first processor core that executed the forward operation, the data flow including an identifier of the first processor core, and transmit the data flow to a second processor core to perform the inverse operation.
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Patent Agency Ranking
公开(公告)号：US11983131B2
公开(公告)日：2024-05-14
申请号：US17134361
申请日：2020-12-26
Applicant: Intel Corporation
Inventor： Patrick G. Kutch , Andrey Chilikin , Niall D. McDonnell , Brian A. Keating , Naveen Lakkakula , Ilango S. Ganga , Venkidesh Krishna Iyer , Patrick Fleming , Lokpraveen Mosur
IPC: G06F13/40 , G06F3/06 , G06F9/50 , G06F12/0802 , G06F13/42
CPC classification number: G06F13/4027 , G06F3/0604 , G06F3/061 , G06F3/0656 , G06F3/0679 , G06F9/5083 , G06F12/0802 , G06F13/4221 , G06F2212/6042 , G06F2213/0026 , G06F2213/40
Abstract: Examples described herein include a system comprising: a processing unit package comprising: at least one core and at least one offload processing device communicatively coupled inline between the at least one core and a network interface controller, the at least one offload processing device configurable to perform packet processing. In some examples, the at least one offload processing device is to allow mapping of packet processing pipeline stages of networking applications among software running on the at least one core and the at least one offload processing device to permit flexible entry, exit, and re-entry points among the at least one core and the at least one offload processing device.
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公开(公告)号：US20230289229A1
公开(公告)日：2023-09-14
申请号：US17854322
申请日：2022-06-30
Applicant: Intel Corporation
Inventor： Utkarsh Y. Kakaiya , Saurabh Gayen , Kapil Sood , Naveen Lakkakula
CPC classification number: G06F9/5027 , G06F9/4881 , G06F21/57
Abstract: Methods and apparatus relating to confidential computing extensions for highly scalable accelerators are described. One or more embodiments provide extensions for scalable accelerator(s) to be able to directly assign accelerator work-queue(s) to Trusted Execution Environment (TEE) Virtual Machines (TVMs). Other embodiments are also disclosed and claimed.
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公开(公告)号：US10680643B2
公开(公告)日：2020-06-09
申请号：US16297579
申请日：2019-03-08
Applicant: Intel Corporation
Inventor： David K. Cassetti , Stephen T. Palermo , Sailesh Bissessur , Patrick Fleming , Lokpraveen Mosur , Smita Kumar , Pradnyesh S. Gudadhe , Naveen Lakkakula , Brian Will , Atul Kwatra
IPC: H03M7/38 , H03M7/30 , H03M7/40 , G06F40/126 , G06F40/149 , G06F40/157 , G06F40/284 , H03M7/00 , H03M5/00
Abstract: In connection with compression of an input stream, multiple portions of the input stream are searched against previously received portions of the input stream to find any matches of character strings in the previously received portions of the input stream. In some cases, matches of longer character strings, as opposed to shorter character strings, can be selected for inclusion in an encoded stream that is to be compressed. Delayed selection can occur whereby among multiple matches, a match that is longer can be selected for inclusion in the encoded stream and non-selected a character string match is reverted to a literal. A search engine that is searching an input stream to identify a repeat pattern of characters can cease to search for characters that were included in the selected character string match.
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公开(公告)号：US12026116B2
公开(公告)日：2024-07-02
申请号：US17134361
申请日：2020-12-26
Applicant: Intel Corporation
Inventor： Patrick G. Kutch , Andrey Chilikin , Niall D. McDonnell , Brian A. Keating , Naveen Lakkakula , Ilango S. Ganga , Venkidesh Krishna Iyer , Patrick Fleming , Lokpraveen Mosur
IPC: G06F13/40 , G06F3/06 , G06F9/50 , G06F12/0802 , G06F13/42
CPC classification number: G06F13/4027 , G06F3/0604 , G06F3/061 , G06F3/0656 , G06F3/0679 , G06F9/5083 , G06F12/0802 , G06F13/4221 , G06F2212/6042 , G06F2213/0026 , G06F2213/40
Abstract: Examples described herein include a system comprising: a processing unit package comprising: at least one core and at least one offload processing device communicatively coupled inline between the at least one core and a network interface controller, the at least one offload processing device configurable to perform packet processing. In some examples, the at least one offload processing device is to allow mapping of packet processing pipeline stages of networking applications among software running on the at least one core and the at least one offload processing device to permit flexible entry, exit, and re-entry points among the at least one core and the at least one offload processing device.
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公开(公告)号：US11431351B2
公开(公告)日：2022-08-30
申请号：US16297577
申请日：2019-03-08
Applicant: Intel Corporation
Inventor： David K. Cassetti , Stephen T. Palermo , Sailesh Bissessur , Patrick Fleming , Lokpraveen Mosur , Smita Kumar , Pradnyesh S. Gudadhe , Naveen Lakkakula , Brian Will , Atul Kwatra
IPC: H03M7/34 , H03M7/30 , H03M7/40 , G06F40/126 , G06F40/149 , G06F40/157 , G06F40/284 , H03M7/00 , H03M5/00 , H03M7/42
Abstract: A compression scheme can be selected for an input data stream based on characteristics of the input data stream. For example, when the input data stream is searched for pattern matches, input stream characteristics used to select a compression scheme can include one or more of: type and size of an input stream, a length of a pattern, a distance from a start of where the pattern is to be inserted to the beginning of where the pattern occurred previously, a gap between two pattern matches (including different or same patterns), standard deviation of a length of a pattern, standard deviation of a distance from a start of where the pattern is to be inserted to the beginning of where the pattern occurred previously, or standard deviation of a gap between two pattern matches. Criteria can be established whereby one or more characteristics are used to select a particular encoding scheme.
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