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公开(公告)号：US20190139184A1
公开(公告)日：2019-05-09
申请号：US16235641
申请日：2018-12-28
Applicant: Intel Corporation
Inventor： Atthar Mohammed , Hiu-Fai Chan , Hyeong-Seok Ha , Jong Dae Oh , Karthik Nagasubramanian , Ping Liu , Samuel Wong , Satya Yedidi , Sumit Mohan , Vidhya Krishnan , Pavan Kumar Saranu , Ashokanand N
IPC: G06T1/20 , H04N19/42 , H04N19/30 , G06F9/38 , H04N19/172
Abstract: Methods, apparatuses and systems may provide for technology that processes portions of video frames in different hardware pipes. More particularly, implementations relate to technology that provides splitting of a frame into columns or rows and processing each of these in different hardware pipes and managing the dependency in hardware. Such operations may achieve this support while at the same time providing enough flexibility to use these pipes independently when the higher performance is not required.
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公开(公告)号：US09681133B2
公开(公告)日：2017-06-13
申请号：US13729367
申请日：2012-12-28
Applicant: Intel Corporation
Inventor： Hiu-Fai R. Chan , Samuel Wong , Scott W. Cheng , Mohmad I. Qurashi
Abstract: CABAC coefficient decoding may be increased to two bins per clock by performing a calculation for a first bin followed by renormalization for the first bin in a first thread and performing a calculation for a second bin and renormalization for the second bin being after the first bin calculation and renormalization using a second thread different from the first thread.
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公开(公告)号：US09432666B2
公开(公告)日：2016-08-30
申请号：US13719679
申请日：2012-12-19
Applicant: Intel Corporation
Inventor： Mohmad I. Qurashi , Samuel Wong , Hiu-Fai R. Chan , Scott W. Cheng
Abstract: Context-adaptive variable length bitstream decoding performance may be improved and power consumption reduced by pushing the variable length decoding beyond one syntax element per clock pulse.
Abstract translation: 可以通过将可变长度解码超过每个时钟脉冲一个语法元素来改善上下文自适应可变长度比特流解码性能并降低功耗。
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