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公开(公告)号：US11983791B2
公开(公告)日：2024-05-14
申请号：US17019479
申请日：2020-09-14
Applicant: Intel Corporation
Inventor： Sreenivas Kothandaraman , Karthik Vaidyanathan , Abhishek R. Appu , Karol Szerszen , Prasoonkumar Surti
IPC: G06T1/20 , G06F9/38 , G06F16/907 , G06T7/90
CPC classification number: G06T1/20 , G06F9/3838 , G06F9/3877 , G06F16/907 , G06T7/90
Abstract: An apparatus to facilitate compression of memory data is disclosed. The apparatus comprises one or more processors to receive uncompressed data, adapt a format of the uncompressed data to a compression format, perform a color transformation from a first color space to a second color space, perform a residual computation to generate residual data, compress the residual data via entropy encoding to generate compressed data and packing the compressed data.
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公开(公告)号：US12299940B2
公开(公告)日：2025-05-13
申请号：US17854310
申请日：2022-06-30
Applicant: Intel Corporation
Inventor： Sreenivas Kothandaraman , Stephen Junkins , Srihari Pratapa , Prasoonkumar Surti
Abstract: Interleaving of variable bitrate streams for GPU implementations is described. An example of an apparatus includes one or more processors including a graphic processor, the graphics processor including a super-compression encoder pipeline to provide variable width interleaved coding; and memory for storage of data, wherein the graphics processor is to perform parallel dictionary encoding on a bitstream of symbols one of multiple workgroups, the workgroup to employ a plurality of encoders to generate a plurality of token-streams of variable lengths; create a histogram including at least tokens from the plurality of token-streams for the workgroup to generate an optimized entropy code; entropy code each of the plurality of token-streams for the workgroup into an encoded bitstream; and variably interleave the encoded bitstreams to generate an interleaved bitstream and bookkeep a size of the interleaved bitstream.
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公开(公告)号：US12223682B2
公开(公告)日：2025-02-11
申请号：US17357038
申请日：2021-06-24
Applicant: Intel Corporation
Inventor： Stephen Junkins , Sreenivas Kothandaraman , Prasoonkumar Surti , Srihari Pratapa , William Hux , John Feit
Abstract: Variable width interleaved coding for graphics processing is described. An example of an apparatus includes one or more processors including a graphic processor; and memory for storage of data including data for graphics processing, wherein the graphics processor includes an encoder pipeline to provide variable width interleaved coding and a decoder pipeline to decode the variable width interleaved coding, and wherein the encoder pipeline is to receive a plurality of bitstreams from workgroups; perform parallel entropy encoding on the bitstreams to generate a plurality of encoded bitstreams for each of the workgroups; perform variable interleaving of the bitstreams for each workgroup based at least in part on data requirements for decoding received from the decoder pipeline; and compact outputs for each of the workgroups into a contiguous stream of interleaved data.
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公开(公告)号：US20240354886A1
公开(公告)日：2024-10-24
申请号：US18599418
申请日：2024-03-08
Applicant: Intel Corporation
Inventor： Sreenivas Kothandaraman , Karthik Vaidyanathan , Abhishek R. Appu , Karol Szerszen , Prasoonkumar Surti
IPC: G06T1/20 , G06F9/38 , G06F16/907 , G06T7/90
CPC classification number: G06T1/20 , G06F9/3838 , G06F9/3877 , G06F16/907 , G06T7/90
Abstract: An apparatus to facilitate compression of memory data is disclosed. The apparatus comprises one or more processors to receive uncompressed data, adapt a format of the uncompressed data to a compression format, perform a color transformation from a first color space to a second color space, perform a residual computation to generate residual data, compress the residual data via entropy encoding to generate compressed data and packing the compressed data.
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公开(公告)号：US20230385985A1
公开(公告)日：2023-11-30
申请号：US17824372
申请日：2022-05-25
Applicant: Intel Corporation
Inventor： Sreenivas Kothandaraman , Abhishek R. Appu , Prosun Chatterjee , Mohamed Farook
CPC classification number: G06T3/4084 , G06T9/00
Abstract: Methods, systems and apparatuses provide for encoder technology that conducts a spatial transformation on tiles in a block of an image, wherein the spatial transformation is conducted on a per tile basis and results in a first sub-band data and second sub-band data, predicts residual data from the first sub-band data, and generates quantization data from the second sub-band data, wherein the residual data and the quantization data represent a lossy compressed portion of the image. Additionally, decoder technology may recover first sub-band data from residual data, scale up to second sub-band data from quantization data, wherein the residual data and the quantization data represent a lossy compressed portion of an image, and conduct an inverse spatial transformation on the first sub-band data and the second sub-band data, wherein the inverse spatial transformation is conducted on a per tile basis and results in tiles in a block of the image.
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Patent Agency Ranking
公开(公告)号：US20240394956A1
公开(公告)日：2024-11-28
申请号：US18675746
申请日：2024-05-28
Applicant: Intel Corporation
Inventor： Sven Woop , Michael J. Doyle , Sreenivas Kothandaraman , Karthik Vaidyanathan , Abhishek R. Appu , Carsten Benthin , Prasoonkumar Surti , Holger Gruen , Stephen Junkins , Adam Lake , Bret G. Alfieri , Gabor Liktor , Joshua Barczak , Won-Jong Lee
Abstract: Apparatus and method for efficient graphics processing including ray tracing. For example, one embodiment of a graphics processor comprises: execution hardware logic to execute graphics commands and render images; an interface to couple functional units of the execution hardware logic to a tiled resource; and a tiled resource manager to manage access by the functional units to the tiled resource, a functional unit of the execution hardware logic to generate a request with a hash identifier (ID) to request access to a portion of the tiled resource, wherein the tiled resource manager is to determine whether a portion of the tiled resource identified by the hash ID exists, and if not, to allocate a new portion of the tiled resource and associate the new portion with the hash ID.
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公开(公告)号：US11995767B2
公开(公告)日：2024-05-28
申请号：US17083123
申请日：2020-10-28
Applicant: Intel Corporation
Inventor： Michael Doyle , Sreenivas Kothandaraman
CPC classification number: G06T17/10 , G06T1/20 , G06T3/4007 , G06T9/00 , G06T15/06 , G06T15/08 , G06T17/20 , G06T15/005 , G06T2210/12
Abstract: Apparatus and method for compression of acceleration structure build data in a ray tracing implementation. For example, one embodiment of an apparatus comprises: traversal hardware logic to traverse rays through a graphics scene comprising a plurality of primitives; and an acceleration data structure processing unit comprising: a bounding box compressor to compress a set of bounding boxes to generate a plurality of bounding box compression blocks, and an index compressor to compress a set of indices to generate a plurality of index compression blocks, and an acceleration data structure builder for constructing acceleration structures based on bounding box compression blocks and index compression blocks.
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公开(公告)号：US20230057492A1
公开(公告)日：2023-02-23
申请号：US17854310
申请日：2022-06-30
Applicant: Intel Corporation
Inventor： Sreenivas Kothandaraman , Stephen Junkins , Srihari Pratapa , Prasoonkumar Surti
Abstract: Interleaving of variable bitrate streams for GPU implementations is described. An example of an apparatus includes one or more processors including a graphic processor, the graphics processor including a super-compression encoder pipeline to provide variable width interleaved coding; and memory for storage of data, wherein the graphics processor is to perform parallel dictionary encoding on a bitstream of symbols one of multiple workgroups, the workgroup to employ a plurality of encoders to generate a plurality of token-streams of variable lengths; create a histogram including at least tokens from the plurality of token-streams for the workgroup to generate an optimized entropy code; entropy code each of the plurality of token-streams for the workgroup into an encoded bitstream; and variably interleave the encoded bitstreams to generate an interleaved bitstream and bookkeep a size of the interleaved bitstream.
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公开(公告)号：US20220301228A1
公开(公告)日：2022-09-22
申请号：US17357038
申请日：2021-06-24
Applicant: Intel Corporation
Inventor： Stephen Junkins , Sreenivas Kothandaraman , Prasoonkumar Surti , Srihari Pratapa , William Hux , John Feit
Abstract: Variable width interleaved coding for graphics processing is described. An example of an apparatus includes one or more processors including a graphic processor; and memory for storage of data including data for graphics processing, wherein the graphics processor includes an encoder pipeline to provide variable width interleaved coding and a decoder pipeline to decode the variable width interleaved coding, and wherein the encoder pipeline is to receive a plurality of bitstreams from workgroups; perform parallel entropy encoding on the bitstreams to generate a plurality of encoded bitstreams for each of the workgroups; perform variable interleaving of the bitstreams for each workgroup based at least in part on data requirements for decoding received from the decoder pipeline; and compact outputs for each of the workgroups into a contiguous stream of interleaved data.
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公开(公告)号：US20220084156A1
公开(公告)日：2022-03-17
申请号：US17019479
申请日：2020-09-14
Applicant: Intel Corporation
Inventor： Sreenivas Kothandaraman , Karthik Vaidyanathan , Abhishek R. Appu , Karol Szerszen , Prasoonkumar Surti
IPC: G06T1/20 , G06F9/38 , G06T7/90 , G06F16/907
Abstract: An apparatus to facilitate compression of memory data is disclosed. The apparatus comprises one or more processors to receive uncompressed data, adapt a format of the uncompressed data to a compression format, perform a color transformation from a first color space to a second color space, perform a residual computation to generate residual data, compress the residual data via entropy encoding to generate compressed data and packing the compressed data.
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