公开(公告)号：US10574259B2

公开(公告)日：2020-02-25

申请号：US15723814

申请日：2017-10-03

Applicant: InvenSense, Inc.

Inventor： Du Chen ,  Vadim Tsinker ,  Stanley Bo-Ting Wang

IPC: H03M5/02 ,  H03K17/96 ,  G06F3/044 ,  H03M11/10 ,  H03M11/02

Abstract: A system includes a sensor device, a circuit driving he sensor device at a drive frequency, a receiver, and a low pass filter. The sensor device is configured to change its electrical characteristics in response to external stimuli. The sensor device generates a modulated signal proportional to the external stimuli. The receiver is configured to receive the modulated signal and further configured to demodulate the modulated signal to generate a demodulated signal. The demodulation signal has a guard band. The receiver consumes power responsive to receiving the modulated signal. The low pass filter is configured to receive the demodulated signal and further configured to generate a sensor output.

公开(公告)号：US08723600B1

公开(公告)日：2014-05-13

申请号：US13775057

申请日：2013-02-22

Applicant: Invensense, Inc.

Inventor： Baris Cagdaser ,  Du Chen

IPC: H03F3/45

CPC classification number: G05F3/242 ,  H03F3/16 ,  H03F3/193

Abstract: A circuit utilizes a MOS device in a triode mode of operation and includes a biasing circuit and a MOS device. The MOS device has a drain, a source, and a gate terminal, and is coupled to the biasing circuit. The source terminal, drain terminal, and gate terminal each has a potential and the drain and the source terminals have a resistance. The biasing circuit couples the drain and source terminals of the MOS device to the gate terminal of the MOS device. The biasing circuit couples a DC potential to the gate terminal to adjust the resistance between the source and drain terminals of the MOS device. The resistance between the source and drain terminals is a non-linear function of voltage potentials at the source and drain terminals. The biasing circuit reduces the non-linearity of the resistance between the drain and source terminals by modulating the potential at the gate terminal by a combination of source and drain terminal potentials.

Abstract translation: 电路采用三极管工作模式的MOS器件，并包括偏置电路和MOS器件。 MOS器件具有漏极，源极和栅极端子，并且耦合到偏置电路。 源极端子，漏极端子和栅极端子各自具有电位，漏极和源极端子具有电阻。 偏置电路将MOS器件的漏极和源极端子耦合到MOS器件的栅极端子。 偏置电路将DC电位耦合到栅极端子以调节MOS器件的源极和漏极端子之间的电阻。 源极和漏极端子之间的电阻是源极和漏极端子处的电压电位的非线性函数。 偏置电路通过源极和漏极端子电位的组合调制栅极端子处的电位来降低漏极和源极端之间的电阻的非线性。

公开(公告)号：US10591318B2

公开(公告)日：2020-03-17

申请号：US15693107

申请日：2017-08-31

Applicant: InvenSense, Inc.

Inventor： Pablo Moreno Galbis ,  Du Chen ,  Stanley Bo-Ting Wang

IPC: G01D5/24 ,  G01C19/5776 ,  G01P15/125 ,  G01P21/00

Abstract: A circuit includes a sensor and a half-bridge circuit. The sensor includes a first sensor capacitor and a second sensor capacitor, where capacitances of the first sensor capacitor and the second sensor capacitor change in opposing directions responsive to receiving a physical signal. The sensor generates a plurality of sensor signals according to the physical signal, the plurality of signals including a common mode injection and a plurality of differential signals. The half-bridge circuit includes a first half-bridge capacitor and a second half-bridge capacitor, where capacitances of the first half-bridge capacitor and the second half-bridge capacitor compensate for the common mode injection of the plurality of sensor signals. The sensor and the half-bridge circuit are coupled to a plurality of sense nodes configured to output the plurality of differential signals.

公开(公告)号：US09285207B2

公开(公告)日：2016-03-15

申请号：US13952281

申请日：2013-07-26

Applicant: InvenSense, Inc.

Inventor： Baris Cagdaser ,  Du Chen ,  Hasan Akyol ,  Derek Shaeffer

IPC: G01B7/14 ,  G01D5/241 ,  G01D5/24

CPC classification number: G01B7/14 ,  G01D5/24 ,  G01D5/2412 ,  G01L1/144

Abstract: A method and system for measuring displacement of a structure is disclosed. The method and system comprise providing a first capacitance and providing a second capacitance. The first and second capacitances share a common terminal. The method and system further include determining a difference of the inverses of the value of the first and second capacitances when the structure is displaced. The first capacitance varies in inverse relation to the displacement of the structure.

Abstract translation: 公开了一种用于测量结构位移的方法和系统。 该方法和系统包括提供第一电容并提供第二电容。 第一和第二电容共享公共端子。 所述方法和系统还包括当所述结构被移位时确定所述第一和第二电容的值的反转的差异。 第一电容与结构的位移成反比关系。

公开(公告)号：US20140118073A1

公开(公告)日：2014-05-01

申请号：US13775057

申请日：2013-02-22

Applicant: INVENSENSE, INC.

Inventor： Baris Cagdaser ,  Du Chen

IPC: G05F3/24 ,  H03F3/16

CPC classification number: G05F3/242 ,  H03F3/16 ,  H03F3/193

Abstract: A circuit utilizes a MOS device in a triode mode of operation and includes a biasing circuit and a MOS device. The MOS device has a drain, a source, and a gate terminal, and is coupled to the biasing circuit. The source terminal, drain terminal, and gate terminal each has a potential and the drain and the source terminals have a resistance. The biasing circuit couples the drain and source terminals of the MOS device to the gate terminal of the MOS device. The biasing circuit couples a DC potential to the gate terminal to adjust the resistance between the source and drain terminals of the MOS device. The resistance between the source and drain terminals is a non-linear function of voltage potentials at the source and drain terminals. The biasing circuit reduces the non-linearity of the resistance between the drain and source terminals by modulating the potential at the gate terminal by a combination of source and drain terminal potentials.

Abstract translation: 电路采用三极管工作模式的MOS器件，并包括偏置电路和MOS器件。 MOS器件具有漏极，源极和栅极端子，并且耦合到偏置电路。 源极端子，漏极端子和栅极端子各自具有电势，漏极和源极端子具有电阻。 偏置电路将MOS器件的漏极和源极端子耦合到MOS器件的栅极端子。 偏置电路将DC电位耦合到栅极端子以调节MOS器件的源极和漏极端子之间的电阻。 源极和漏极端子之间的电阻是源极和漏极端子处的电压电位的非线性函数。 偏置电路通过源极和漏极端子电位的组合调制栅极端子处的电位来降低漏极和源极端之间的电阻的非线性。