公开(公告)号：JPH089371A

公开(公告)日：1996-01-12

申请号：JP4091495

申请日：1995-02-28

Applicant: KOREA ELECTRONICS TELECOMM

Inventor： IN SHIYOUSEI ,  RI SOUKUN

IPC: G06F13/00 ,  H04J3/06 ,  H04J3/22 ,  H04L7/04 ,  H04L7/08 ,  H04N5/04 ,  H04N19/00 ,  H04N19/423 ,  H04N19/436 ,  H04N19/68 ,  H04N19/91 ,  H04N7/24

Abstract: PURPOSE: To increase a for-reaching effect by re-synchronizing a code at high speed by using a parallel processing pattern matching when a transmission error occurs in a received variable length code. CONSTITUTION: An input bit string is linked with a barrel shift 12 through an input buffer 10, a latch 11 and these are coupled with an accumulator 14 linked with a PLA 13. The bit string is stored in the latch 11 and the bit string obtained by transferring the present bit string is outputted in the shift 12. Amount of transfer at the next state of the present bit string is calculated at the PLA 13, furthermore, a matching signal is outputted when a character string to be calculated and the pattern matching are not matched and the amount of transfer of the shift 12 is stored by storing transfer of the bit string at the next state when the matching fails in the accumulator 14. A signal is transmitted to the buffer 10 when the matching signal is larger than the amount of transfer of the shift 12 and the bit string at the next state is inputted. Specifically, the present bit string with O to N numbers of bit strings is transmitted to the PLA 13 through the shift 12 and a synchronizing signal is exactly searched.