MANUFACTURE OF SELF-ALIGNED T-GATE GALLIUM ARSENIDE METAL SEMICONDUCTOR FIELD-EFFECT TRANSISTOR

    公开(公告)号:JPH08148507A

    公开(公告)日:1996-06-07

    申请号:JP31538794

    申请日:1994-12-19

    Abstract: PURPOSE: To contribute to high-density integration by reducing a gap between a gate and an ohmic electrode and by reducing a source resistance of a component. CONSTITUTION: Insulation films 104, 105 are vapor-deposited on the surface of a substrate at a first temperature (T1) and a second temperature (T2) (T1>T2), and dry etching is made selectively. Since the second insulation layer 105, which forms an upper layer, has a higher etching rate than the first insulation layer 104 which forms a lower layer, when etching of the first insulation layer 104 is completed and a portion of the substrate which corresponds to a gate is exposed, an excessive etching of the side faces of the second insulation film 105 is started to define a T-shaped space. A T-shaped gate electrode is formed using this space.

Patent Agency Ranking