公开(公告)号：JPH07202681A

公开(公告)日：1995-08-04

申请号：JP28227094

申请日：1994-11-16

Applicant: KOREA ELECTRONICS TELECOMM

Inventor： KIMU JIN OPU ,  KIMU SON YON ,  RI ZOMU DO

IPC: H03K19/20 ,  H03K19/082 ,  H03K19/094 ,  H03K19/21

Abstract: PURPOSE: To obtain a binary-multivalued OR computing element having simple circuit constitution by providing a computing element with a means for selecting either one of a multivalued logic signal and the maximum value of the multivalued logic signal in accordance with a binary logic signal value and outputting the selected value. CONSTITUTION: An arithmetic adder 4 inputs many binary logic values 1, 2,..., K, executes arithmetic addition and outputs a multivalued logic value to a switch 3. When a binary signal inputted to a control terminal is '0', the switch 3 selects a multivalued logic value, and when the binary signal is '1', the switch 3 selects and outputs a maximul logic value inputted from a multivalued-signal maximum value input line. This arrangement including an OR operating function between binary values also allows direct OR operation between a multivalued logic value and a binary logic value, so that the binary-multivalued OR computing element having simple circuit configuration can be obtained. An electronic control switch provided with a control terminal or a 2:1 multiplexer is preferably used for the switch 3.