公开(公告)号：JPH1093587A

公开(公告)日：1998-04-10

申请号：JP20649497

申请日：1997-07-31

Applicant: KOREA ELECTRONICS TELECOMM

Inventor： CHAN KIMU ,  YOEN HO PAKU ,  DO SABU EOMU ,  JAE KEUN KIMU

IPC: H04J3/00 ,  H04J3/16 ,  H04L12/951 ,  H04Q3/00 ,  H04L12/28

Abstract: PROBLEM TO BE SOLVED: To easily realize the ATM cellphysical layer processing circuit by conducting an ATM(asynchronous transfer mode) processing in the unit of bytes at a specific frequency and conducting parallel processing for the remaining processing at a specific speed so as to increase the operating speed of the ATM cell physical layer processing circuit. SOLUTION: In order to decrease the operating speed of the circuit, transmission reception ATM processing sections 10, 60 are operated by a frequency of 77.76MHz and transmission reception pointer processing sections 30, 80 where a function of a frame receiver avoidable of partial byte processing or the like is excluded are operated at a frequency of 19.44MHz. Furthermore, received frame data are descrambled at frame synchronization and separated into four STM(synchronous transfer modules) 1 at a speed of 19.44MHz and they are sent to a reception SOH(section overhead) processing section 90, from which a timing signal generated from a timing control section is applied in common to four 19M streams and processed.