The switched capacitor circuit with reduced leakage current
    1.
    发明公开
    The switched capacitor circuit with reduced leakage current 无效
    具有降低漏电流的开关电容器电路

    公开(公告)号:KR20100040581A

    公开(公告)日:2010-04-20

    申请号:KR20080099779

    申请日:2008-10-10

    CPC classification number: H03H19/004

    Abstract: PURPOSE: A switched capacitor circuit with a reduced leakage current is provided to improve the performance of ADC, DAC, and an analog filter by removing an output error through minimum voltage drop at amplification mode. CONSTITUTION: A first and second MOS transistor(M1,M2) output an input voltage of a first node to a second node in response to the first signal. A sampling capacitor is connected to the second Node. A third MOS transistor(M3) interlinks the other side of the sampling capacitor to the ground in response to the first signal to the ground terminal. A fourth MOS transistor(M4) interlinks one side of the sampling capacitor to the ground in response to the second signal. An operational amplifier(OP) comprises a feedback capacitor connected between a sub input terminal and output terminal. The circuit for reducing leakage current(210) blocks the leakage current in response to the first signal.

    Abstract translation: 目的:提供具有减小的漏电流的开关电容电路,以通过在放大模式下的最小电压降去除输出误差来提高ADC,DAC和模拟滤波器的性能。 构成:响应于第一信号,第一和第二MOS晶体管(M1,M2)将第一节点的输入电压输出到第二节点。 采样电容器连接到第二个节点。 第三MOS晶体管(M3)响应于到接地端子的第一信号将采样电容器的另一侧与地相互连接。 第四MOS晶体管(M4)响应于第二信号将采样电容器的一侧互连到地。 运算放大器(OP)包括连接在子输入端子和输出端子之间的反馈电容器。 用于减少泄漏电流(210)的电路响应于第一信号阻断漏电流。

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