公开(公告)号：JP2001160738A

公开(公告)日：2001-06-12

申请号：JP2000295829

申请日：2000-09-28

Applicant: LUCENT TECHNOLOGIES INC

Inventor： RUBEN HERERA ,  RAUL SAAPESHUKAARU

IPC: G06F7/00 ,  H03K3/353

Abstract: PROBLEM TO BE SOLVED: To provide a finite state machine capable of encoding the n-pieces of the individual states of the machine by using the set of the n-pieces of different elements and simplifying the decoding of the states. SOLUTION: In this finite state machine, transition between the individual states is executed by selectively turning a bistable circuit to 1 state by using a transition circuit activated by the positive transition of asynchronous spiking input for example. In an example execution form, the positive transition is capacitively connected to a switch, the switch connects the complementary output of a bistable element to the ground and thus, the normal output of the element is brought closer to a voltage corresponding to the 1 state. In a second example execution form, by the combination of path transistors, a capacitor is maintained at the normal output voltage of the bistable element of the 1 state until spiking input signals arrives. By the combination of the voltage on the capacitor and the spiking input signals, the complementary output of a different bistable element is connected to the ground and thus, the different bistable element is switched on.

公开(公告)号：JP2001119274A

公开(公告)日：2001-04-27

申请号：JP2000295335

申请日：2000-09-28

Applicant: LUCENT TECHNOLOGIES INC

Inventor： RUBEN HERERA ,  RAUL SAAPESHUKAARU

IPC: H03K3/356

Abstract: PROBLEM TO BE SOLVED: To provide a bistable circuit which is used as a digital construction block circuit that is applied to an electronic system. SOLUTION: This edge trigger type flip-flop circuit includes a pair of capacitors which are alternately charged and discharged up to the voltage approximate to the value of a supply line, joins a high or low impedance path to the input signal transition of prescribed polarity (e.g. a positive state) in combinations with a small number of switches and triggers the state change. In another embodiment, a large switching capacitor is evaded in a circuit which uses a pair of path transistor forms where every capacitor is connected to the output terminal of a bistable device. In regard to the capacitor voltage, the output voltage of the corresponding bistable device is tracked when an input signal has a prescribed state (e.g. a low level) and the corresponding voltage value is accumulated when the capacitor is turned off in another state (e.g. a high level) of the input signal. Then the capacitor voltage and the selected input signal transition are applied to effectively trigger the transition of the bistable device.