Abstract:
An apparatus and method for biasing a power amplifier circuit operating as a Digital to Analog Converter (DAC) are described. The bias circuit comprises a first transistor with a reference voltage coupled to its base terminal, a second transistor coupled to the emitter terminal of the first transistor at its collector terminal, and a third transistor with its base terminal coupled to the first and second transistors, and to an input signal.
Abstract:
A power amplifier (100) has a first stage amplifier (102) and a second stage amplifier (106), each stage of the power amplifier being configured in one of at least two power states based on a desired power output. When the first and second stages (102,106) are configured in a first state, the power amplifier delivers efficient amplification in a first output power range and, when the first and second stages are configured in a second state, the power amplifier delivers efficient amplification in a second output power range. By configuring each stage (102,106) in one of at least two states, a high level of power efficiency can be achieved for a broad range of power levels.
Abstract:
A power amplifier (100) has a first stage amplifier (102) and a second stage amplifier (106), each stage of the power amplifier being configured in one of at least two power states based on a desired power output. When the first and second stages (102,106) are configured in a first state, the power amplifier delivers efficient amplification in a first output power range and, when the first and second stages are configured in a second state, the power amplifier delivers efficient amplification in a second output power range. By configuring each stage (102,106) in one of at least two states, a high level of power efficiency can be achieved for a broad range of power levels.