公开(公告)号：JP2008244302A

公开(公告)日：2008-10-09

申请号：JP2007085078

申请日：2007-03-28

Applicant: Matsushita Electric Works Ltd ,  松下電工株式会社

Inventor： YASUDA MASAHARU

IPC: H01L33/32 ,  H01L33/50

Abstract: PROBLEM TO BE SOLVED: To improve reliability of a compound semiconductor light-emitting element wherein a nanocolumn is formed on a conductive substrate, insulation between nanololumns and between a p-type layer and an n-type layer is ensured therebetween and an insulator which protects a light-emitting layer is buried. SOLUTION: In a compound semiconductor element, a fine particle 41 consisting of a material which is chargeable, such as, silicon and becomes insulating by thermal oxidation is used as a material of an insulator 4, a positive voltage is applied from a power supply 13 to a substrate 2 wherein a nanocolumn is planted and the fine particle 41 is provided with negative charge on colliding with electron and is subjected to electrostatic attraction to the substrate 2 (a) to (c). Thereafter, the fine particle 41 changes to insulating properties through heat treatment under an oxygen atmosphere, and is dissolved and solidified, and is immobilized as an oxide layer between nanocolumns 3 (d). Accordingly, it is possible to embed the insulator 4 readily and uniformly, without having to break down the nanocolumn 3 such as spin coat, thus improving the reliability of the element. COPYRIGHT: (C)2009,JPO&INPIT

Abstract translation: 要解决的问题为了提高在导电性基板上形成纳米柱的化合物半导体发光元件的可靠性，确保了纳米柱之间以及p型层与n型层之间的绝缘，并且 保护发光层的绝缘体被埋置。 解决方案：在化合物半导体元件中，使用由可充电材料（例如硅）构成并通过热氧化而变得绝缘的微粒41作为绝缘体4的材料，从 将电源13连接到其上种植有纳米柱的基板2，并且微粒41在与电子碰撞时具有负电荷，并且对基板2（a）至（c）进行静电吸引。 此后，微细粒子41在氧气氛下通过热处理而变为绝缘性，并溶解固化，并作为氧化物层固定在纳米柱3（d）之间。 因此，可以容易且均匀地嵌入绝缘体4，而不必分解诸如旋涂的纳米柱3，从而提高元件的可靠性。 版权所有（C）2009，JPO＆INPIT

公开(公告)号：JP2007258277A

公开(公告)日：2007-10-04

申请号：JP2006077722

申请日：2006-03-20

Applicant: Matsushita Electric Works Ltd ,  Univ Of Tsukuba ,  国立大学法人 筑波大学 ,  松下電工株式会社

Inventor： TAKAKURA NOBUYUKI ,  YASUDA MASAHARU ,  CHICHIBU SHIGEHIDE ,  ARAYA TAKESHI

IPC: H01L33/32 ,  H01L33/42 ,  H01L33/44 ,  H01L33/60

Abstract: PROBLEM TO BE SOLVED: To provide a semiconductor light emitting device which can improve light extraction efficiency from an optional light extraction surface. SOLUTION: An anode electrode 5 is formed on a p-type semiconductor layer 4 on one surface side of a base substrate formed of a sapphire substrate, and a cathode electrode 6 is formed on the lamination side of a light emitting layer 3 in an n-type semiconductor layer 2. The cathode electrode 6 is comprised of an ohmic contact layer 61 and an external connection metal layer 62. The semiconductor light emitting device is provided with a multilayer mirror 53 which is provided on the side of the light emitting layer 3 in the anode electrode 5 located on the opposite side to the optional light extraction surface (other surface of the base substrate 1) against the light emitting layer 3, and which reflects a light radiated from the light emitting layer 3 wherein two kinds of conductive dielectric films 53a and 53b with different refractive indexes are periodically stacked. The anode electrode 5 is comprised of the multilayer film mirror 53, an ohmic contact layer 51, and external connection metal layer 52. COPYRIGHT: (C)2008,JPO&INPIT

Abstract translation: 要解决的问题：提供一种可以从可选的光提取表面提高光提取效率的半导体发光器件。 解决方案：在由蓝宝石衬底形成的基底衬底的一个表面侧上的p型半导体层4上形成阳极电极5，并且在发光层3的层叠侧上形成阴极电极6 在n型半导体层2中。阴极电极6由欧姆接触层61和外部连接金属层62组成。半导体发光器件设置有多层反射镜53，其设置在光的一侧 位于与可选的光提取面（基底基板1的其他表面）相反侧的阳极电极5中的发光层3抵靠着发光层3，反射从发光层3射出的光，其中两种 具有不同折射率的导电介电膜53a和53b周期性堆叠。 阳极电极5由多层膜反射镜53，欧姆接触层51和外部连接金属层52组成。版权所有（C）2008，JPO＆INPIT

公开(公告)号：JP2007165405A

公开(公告)日：2007-06-28

申请号：JP2005356768

申请日：2005-12-09

Applicant: Matsushita Electric Works Ltd ,  松下電工株式会社

Inventor： TAKANO TAKAYOSHI ,  YASUDA MASAHARU ,  KONDO YUKIHIRO ,  TAKAKURA NOBUYUKI ,  IKEDA JUNJI ,  KAWANISHI HIDEO

IPC: H01L33/06 ,  H01L33/12 ,  H01L33/32 ,  H01L33/34

Abstract: PROBLEM TO BE SOLVED: To improve light derivation efficiency in a light emitting diode including at least an n-type nitride semiconductor layer, a light emitting layer, and a p-type nitride semiconductor layer stacked on a substrate oriented in the c axis direction. SOLUTION: A main wavelength peak is set in an ultraviolet region of 290 nm or lower by adjusting an Al content of a light emitting layer 7 among semiconductor layers consisting of AlGaN or AlInGaN or the like, and adjusting an energy band structure of a valence band. Consequently, light emission in TM mode is ensured in TE and TM modes as light propagation modes, and light emission in the TM mode at 240 nm dominates. By utilizing the matter described above, emitted light from an element end surface is used in the TM mode where a reflectance ratio at the element end surface is low to facilitate light derivation to the outside of the element. It is accordingly possible to improve light derivation efficiency compared with cases where light is derived from the surface of a substrate 2 and the surface of the p-type nitride semiconductor layer 9. COPYRIGHT: (C)2007,JPO&INPIT

Abstract translation: 要解决的问题：为了提高包括至少n型氮化物半导体层，发光层和堆叠在c上取向的衬底上的p型氮化物半导体层的发光二极管中的光衍生效率 轴方向。 解决方案：通过调节由AlGaN或AlInGaN等构成的半导体层之中的发光层7的Al含量，将主波长峰值设定在290nm以下的紫外区域，并调整能量带结构 价带。 因此，TM模式下的发光在TE和TM模式下被确保为光传播模式，而在240nm的TM模式下的发光占主导地位。 通过利用上述物质，元件端面的发射光以元件端面的反射率比较低的TM模式使用，以促进向元件外部的光的衍射。 因此，与从基板2的表面和p型氮化物半导体层9的表面导出光的情况相比，可以提高光的衍射效率。（C）2007，JPO＆INPIT

公开(公告)号：JP2007095745A

公开(公告)日：2007-04-12

申请号：JP2005279501

申请日：2005-09-27

Applicant: Matsushita Electric Works Ltd ,  松下電工株式会社

Inventor： YASUDA MASAHARU ,  TAKAKURA NOBUYUKI ,  TAKANO TAKAYOSHI ,  KAWANISHI HIDEO

IPC: H01L33/12 ,  H01L21/205 ,  H01L33/22 ,  H01L33/32

Abstract: PROBLEM TO BE SOLVED: To increase luminous efficiency in a semiconductor light-emitting element where at least an n-type nitride semiconductor layer, a luminous layer, and a p-type nitride semiconductor layer are laminated on a substrate, and an irregular structure is provided on an upper surface. SOLUTION: On a sapphire substrate 2, a buffer layer 3 is formed for film-forming an n-type gallium nitride compound semiconductor layer 4, the luminous layer 5, and a p-type gallium nitride compound semiconductor layer 6 at a film-forming temperature of 1,000°C. The temperature is decreased to 800°C, a projection 7 in a rectangular pyramid shape is subjected to the growth of crystal nucleuses, and a p layer 6 is etched for forming irregularities 8 with the projection 7 as a mask, thus improving light extraction efficiency to light entering the p layer 6 from the luminous layer 5 nearly vertically since the irregularities 8 for improving the light extraction efficiency is not in a rectangular shape. In the irregularities 8, the p layer 6 is grown as it is, thus reducing interfaces, and improving the light extraction efficiency further. COPYRIGHT: (C)2007,JPO&INPIT

Abstract translation: 解决的问题为了提高半导体发光元件的发光效率，其中至少n型氮化物半导体层，发光层和p型氮化物半导体层层叠在基板上，并且 在上表面设置不规则结构。 解决方案：在蓝宝石衬底2上，形成缓冲层3，以形成n型氮化镓系化合物半导体层4，发光层5和p型氮化镓系化合物半导体层6 成膜温度为1000℃。 将温度降低至800℃，使矩形金字塔形状的突起7经受晶核的生长，并且以突起7为掩模蚀刻p层6以形成凹凸8，从而提高光提取效率 由于用于提高光提取效率的不规则8不是矩形，所以几乎垂直地从发光层5进入p层6的光。 在不规则部分8中，p层6原样生长，从而减少界面，进一步提高光提取效率。 版权所有（C）2007，JPO＆INPIT

公开(公告)号：JP2005019530A

公开(公告)日：2005-01-20

申请号：JP2003179653

申请日：2003-06-24

Applicant: Matsushita Electric Works Ltd ,  松下電工株式会社

Inventor： YASUIKE NORIYUKI ,  TAKAKURA NOBUYUKI ,  KUZUHARA KAZUNARI ,  YASUDA MASAHARU ,  AKEDA TAKANORI

IPC: H01L29/41 ,  H01L33/32 ,  H01L33/38 ,  H01L33/00

Abstract: PROBLEM TO BE SOLVED: To provide a semiconductor light emitting device which is high in light extraction efficiency. SOLUTION: The semiconductor light emitting device is equipped with a support substrate 1, a first conductivity-type semiconductor layer 2 provided on the support substrate 1, an active layer 3 provided on the first conductivity-type semiconductor layer 2 to serve as a light emitting layer, and a second conductivity-type semiconductor layer 4 provided on the active layer. Furthermore, at least two or more laminates 5 which are each composed of the active layer 3 and the second conductivity-type semiconductor layer 4 that are successively laminated on the first conductivity-type semiconductor layer 2, an exposed region 6 which is left exposed on the first conductivity-type semiconductor layer 2 when the laminates 5 are provided on the semiconductor layer 2, first electrodes 7 which are provided on the exposed region 6 to apply a voltage to the active layer 3 and to reflect light emitted from the side of the active layer 3 in the desired direction, and second electrodes 8 which are each provided on the second conductivity-type semiconductor layer 4 to supply a voltage to the active layer 3. COPYRIGHT: (C)2005,JPO&NCIPI

Abstract translation: 要解决的问题：提供一种光提取效率高的半导体发光器件。 解决方案：半导体发光器件配备有支撑基板1，设置在支撑基板1上的第一导电型半导体层2，设置在第一导电型半导体层2上的有源层3，用作 发光层和设置在有源层上的第二导电型半导体层4。 另外，由连续层叠在第一导电型半导体层2上的有源层3和第二导电型半导体层4构成的至少两层以上的层叠体5暴露于 当层叠体5设置在半导体层2上时的第一导电型半导体层2，设置在曝光区域6上以向有源层3施加电压并反射从侧面发射的光的第一电极7 活性层3在期望的方向上，第二电极8分别设置在第二导电类型半导体层4上以向有源层3提供电压。版权所有（C）2005，JPO＆NCIPI

公开(公告)号：JP2004356237A

公开(公告)日：2004-12-16

申请号：JP2003149894

申请日：2003-05-27

Applicant: Matsushita Electric Works Ltd ,  松下電工株式会社

Inventor： AKEDA TAKANORI ,  TAKAKURA NOBUYUKI ,  KUZUHARA KAZUNARI ,  YASUDA MASAHARU

IPC: H01L33/10 ,  H01L33/22 ,  H01L33/32 ,  H01L33/40 ,  H01L33/62 ,  H01L33/00

Abstract: PROBLEM TO BE SOLVED: To provide a semiconductor light emitting element which can improve extraction efficiency of light by increasing heat dissipation of the light emitting element. SOLUTION: The semiconductor light emitting element is provided with a substrate 1 which has transparency to emitted light, at least n-type and a p-type gallium nitride based compound semiconductor layers 3, 5 arranged on one side surface of the substrate 1, a p-layer electrode 7 arranged on the p-type semiconductor layer 5, and an n-layer electrode 6 arranged on the n-type semiconductor layer 3 which is exposed by eliminating a part of the p-type semiconductor layer 5. At least the p-layer electrode 7 out of the p-layer electrode 7 and the n-layer electrode 6 is provided with an insulating layer 82 which has penetrating holes 83 on its exposed surface, heat conduction parts 81 embedded in the penetrating holes 83, and a heat dissipation layer 8 which is laminated on the insulating layer 82 and fixed and thermally connected to the heat conduction parts 81. COPYRIGHT: (C)2005,JPO&NCIPI

公开(公告)号：JP2004327544A

公开(公告)日：2004-11-18

申请号：JP2003117254

申请日：2003-04-22

Applicant: Matsushita Electric Works Ltd ,  松下電工株式会社

Inventor： KUZUHARA KAZUNARI ,  TAKAKURA NOBUYUKI ,  YASUDA MASAHARU ,  AKEDA TAKANORI ,  TAKAMI SHIGENARI

IPC: H01L33/06 ,  H01L33/32 ,  H01L33/62 ,  H01L33/00

CPC classification number: H01L2224/14 ,  H01L2224/16225

Abstract: PROBLEM TO BE SOLVED: To provide a semiconductor light emitting element which is capable of reducing an optical refractive index difference at an interface so as to improve its light extraction efficiency.
SOLUTION: The semiconductor light emitting element is equipped with a substrate 1 transparent to its own emission light, laminated semiconductor layers 2 and 4 which are formed on the one surface of the board 1 and composed of, at least, laminated p-type and n-type gallium nitride compound semiconductor layers, a p-layer electrode 5a which is provided on the p-type semiconductor layer 4 and electrically connected to it, and an n-layer electrode 5b which is provided on a part of the n-type semiconductor layer 2 exposed by removing the prescribed region of the p-type semiconductor 4 and a part of the n-type semiconductor layer 2 and electrically connected to the n-type semiconductor layer 2. The substrate 1 is equipped with a transparent layer 6 which is formed on its other surface and decreases gradually in refractive index toward its exposed surface from its one surface where the semiconductor layers 2 and 4 are laminated.
COPYRIGHT: (C)2005,JPO&NCIPI

公开(公告)号：JP2003249479A

公开(公告)日：2003-09-05

申请号：JP2002035121

申请日：2002-02-13

Applicant: MATSUSHITA ELECTRIC WORKS LTD

Inventor： YASUDA MASAHARU

IPC: H01L21/306

Abstract: PROBLEM TO BE SOLVED: To provide a semiconductor process monitoring method which can measure film thickness or the like of a film formed on a semiconductor substrate readily and stably in a nondestructive manner, and a semiconductor process monitoring device having durability. SOLUTION: In a semiconductor process monitoring method for carrying out thickness processing of a semiconductor substrate by using wet etching, relationship between electrical characteristics regarding process liquid 3 in wet etching process and the thickness or thickness variation amount of a semiconductor substrate 7, which is a processing object, is obtained in advance by using a high frequency power supply 4 which applies high frequency voltage or high frequency power. When the semiconductor substrate 7 is subjected to wet etching process, electrical characteristics of the process liquid 3 in wet etching process are measured and the thickness variation amount or thickness amount of the semiconductor substrate 7 is calculated based on the relationship. When the thickness of the semiconductor substrate 7 is a desired thickness, wet etching process is finished. COPYRIGHT: (C)2003,JPO

公开(公告)号：JP2003243708A

公开(公告)日：2003-08-29

申请号：JP2002039219

申请日：2002-02-15

Applicant: MATSUSHITA ELECTRIC WORKS LTD

Inventor： TAKAKURA NOBUYUKI ,  YASUDA MASAHARU ,  KUZUHARA KAZUNARI ,  HAYAZAKI YOSHIKI ,  NAGAHAMA HIDEO

IPC: H01L29/41 ,  H01L33/12 ,  H01L33/32 ,  H01L33/38 ,  H01L33/00

Abstract: PROBLEM TO BE SOLVED: To improve an emission intensity by a semiconductor light emitting element of the structure in which electrodes for applying a bias to a light emitting semiconductor layer are formed at the same surface side of a supporting substrate and to prevent a power from being lost. SOLUTION: A first conductivity type first contact layer 2 is laminated on the support substrate 1. The light emitting semiconductor layer 3 having a light emitting junction part 33 formed in a boundary between a first conductivity type clad 31 and a second conductivity type clad 32 on the layer 2. A second conductivity type second contact layer 4 is laminated on the layer 3. An exposure region of the surface is formed adjacent to the layer 3 on the layer 2, and a first electrode 5 of a substantially one character state opposed to the layer 3 is formed on the region 21. A second electrode 6 having a bar-like electrode piece 61 substantially equal to a distance between the distal ends of a plurality of the first electrodes 5 separated at a substantially equal interval in a direction approaching from a remote position to the electrode 5 and the electrode 5 are formed on the layer 4. COPYRIGHT: (C)2003,JPO

公开(公告)号：JP2002008895A

公开(公告)日：2002-01-11

申请号：JP2000193416

申请日：2000-06-27

Applicant: MATSUSHITA ELECTRIC WORKS LTD

Inventor： TAGUCHI NORIYUKI ,  SAWADA KOJI ,  YAMAZAKI KEIICHI ,  YASUDA MASAHARU ,  NAKAZONO YOSHIYUKI ,  INOOKA YUKIKO

IPC: H05H1/24 ,  H01L21/027 ,  H01L21/205 ,  H01L21/302 ,  H01L21/3065 ,  H05H1/34

Abstract: PROBLEM TO BE SOLVED: To provide a plasma treatment device capable of making plasma treatment of the whole surface of a work in the form of flat plate uniformly in a short period of time. SOLUTION: The invention comprises a reaction vessel 1 formed out of an insulating material and electrodes 2 and 3 which contact with the outer surface of the reaction vessel 1 and impress an AC or pulse-form voltage to the inside of the reaction vessel 1. In a pressure near the atmospheric, a glow- form discharge is generated in the vessel 1 by supplying the plasma producing gas into the vessel 1 and impressing the AC or pulse-form voltage to the inside of the vessel 1, and thereby plasma is generated inside the vessel 1. The plasma is allowed to blow in jet form out of a slit-form blowout hole 4 provided in the vessel 1, wherein the blowout hole should have a slit width between 1 mm and 5 mm.