公开(公告)号：EP3029579A3

公开(公告)日：2016-06-22

申请号：EP15202847.8

申请日：2008-11-21

Applicant: MICROCHIP TECHNOLOGY INC.

Inventor： SIMMONS, Michael ,  SCHLUNDER, Howard Henry

IPC: G06F13/10 ,  G06F13/12 ,  G06F13/16

CPC classification number: G06F13/1673 ,  G06F13/128

Abstract: A controller has an interface, a buffer memory, a first set of registers for accessing the buffer memory, a second set of registers independent from the first set of registers for accessing the buffer memory, and a control unit for decoding and executing buffer memory access commands received by the interface to access the buffer memory through either the first or second set of registers.

公开(公告)号：EP3029579A2

公开(公告)日：2016-06-08

申请号：EP15202847.8

申请日：2008-11-21

Applicant: MICROCHIP TECHNOLOGY INC.

Inventor： SIMMONS, Michael ,  SCHLUNDER, Howard Henry

IPC: G06F13/10 ,  G06F13/12 ,  G06F13/16

CPC classification number: G06F13/1673 ,  G06F13/128

Abstract: A controller has an interface, a buffer memory, a first set of registers for accessing the buffer memory, a second set of registers independent from the first set of registers for accessing the buffer memory, and a control unit for decoding and executing buffer memory access commands received by the interface to access the buffer memory through either the first or second set of registers.

Abstract translation: 控制器具有接口，缓冲存储器，用于访问缓冲存储器的第一组寄存器，独立于用于访问缓冲存储器的第一组寄存器的第二寄存器组，以及用于解码和执行缓冲存储器访问的控制单元 接口接收的命令通过第一组或第二组寄存器访问缓冲存储器。