Abstract:
A mounting assembly for a multiple chip module (13) or other circuit module, which includes a board (11) having a surface including an array of board contacts (22) such as a printed wiring board in a computer system. A circuit module, such as multiple chip module (13), having a first surface and a second surface is included. The circuit module includes an array of circuit contacts (23) on the first surface of the module. An interposer (12) between the board (11) and the first surface of the circuit module, includes conductors (21) between the circuit contacts in the array of circuit contacts (23) on the circuit module and board contacts in the array of board contacts (22) on the board. A thermal bridge member (15) contacts the second surface of the circuit module.
Abstract:
An assembly for electronic components having heat spreaders (11, 17) on two sides comprises a mother board (13) on which to mount electronic components, having a top side with an array of board contacts. A multiple chip integrated circuit module (16) carries integrated circuits. The multiple chip module consists of a first substrate, such as aluminum, with a multi-layer interconnect structure on one surface of the aluminum substrate. The integrated circuits are mounted on the interconnect structure on the first substrate. A second substrate manufactured using printed wiring board technology, surrounds the first substrate, and includes an interconnect structure and an array of circuit contacts. Conductors connect the interconnect structure on the first substrate with the interconnect structure (31) on the second substrate. A thermally conductive beseplate (32) is coupled with the multiple chip module on the side opposite the array of circuit contacts. An interposer (15) providing electrical connection between the array of circuit contacts on the multiple chip module and the array of board contacts on the printed wiring board is placed between the multiple chip module and the board.
Abstract:
A semiconductor die carrier (10) is provided for testing semiconductor circuits, the carrier (10), containing: a substrate (16) defining an opening and an outer perimeter (16); I/O pads (18) about the perimeter and an interconnect circuit (37) which includes individual electrical conductors formed in a polymer dielectric. The interconnect circuit overlays a top surface of the substrate and extends across the opening to form a flexible membrane (20) that spans the opening. Die contact pads connected to the conductors are disposed about the membrane with particles deposited on the die contact pads. A fence (23) upstanding from the membrane (20) and sized to receive a test die (22); a top cap (12) that rests upon the die when the die is received within the fence, a bottom cap (14) that rests against a bottom surface of the substrate; and a fastener (30) for securing the top cap to the bottom cap with the die in between are also provided.