Stacked iron core
    3.
    发明专利
    Stacked iron core 审中-公开
    堆叠铁芯

    公开(公告)号:JP2003304654A

    公开(公告)日:2003-10-24

    申请号:JP2002104781

    申请日:2002-04-08

    Abstract: PROBLEM TO BE SOLVED: To provide a stacked iron core which can realize high efficiency, high output, and energy saving of a motor, a transformer, etc., or can downsize them and is superior in magnetic property and is superior in stacking form, by fully utilizing an amorphous thin plate. SOLUTION: In the stacked iron core which is constituted by stacking amorphous iron core pieces, metal plate iron core pieces 2 are provided dispersedly under, between, or above plural sheets of amorphous iron core pieces piled up continuously, and an opening 8 for caulking is made in the lower metal plate iron core piece 2a, and a calking projection 9 made at another metal plate iron core piece 2 described above engages with the opening 8 for caulking of the above lower metal plate iron core piece 2a or a recess 10 behind the caulking projection of the metal plate iron core piece 2 in the next lower layer, passing through a bored hole 7 for calking made in each of amorphous iron core pieces 3, being stacked continuously in plural numbers, thereby caulking the amorphous iron core piece 3. COPYRIGHT: (C)2004,JPO

    Abstract translation: 要解决的问题:提供一种能够实现电动机,变压器等的高效率,高输出和节能的叠层铁芯,或者可以使其小型化并且磁性优异,并且优异 通过充分利用非晶薄板堆叠形式。 解决方案:在通过堆叠非晶铁芯片构成的堆叠铁芯中,金属板铁芯片2分散地设置在连续堆叠的多片非晶铁芯片之下,之间或上方,并且开口8 在下金属板铁芯片2a上形成铆接,并且在上述另一金属板铁芯片2上形成的铆接突起9与用于上述下金属板铁芯片2a的铆接的开口8或凹槽 10位于下一个下层的金属板铁芯片2的铆接突起之后,通过在每个非晶铁芯片3中形成的用于铆接的多孔孔7,多个连续堆叠,从而铆接非晶铁芯 版权所有(C)2004,JPO

    LEAD FRAME FOR SEMICONDUCTOR DEVICE

    公开(公告)号:JPH03181160A

    公开(公告)日:1991-08-07

    申请号:JP32107589

    申请日:1989-12-11

    Abstract: PURPOSE:To enhance economy by connecting an element placing part through wide parts protruding at both sides of a support bar. CONSTITUTION:A punched part 12 to become a semiconductor element placing stage 14 is formed of a material containing copper as a main ingredient by pressing, and inner leads 13, a support bar 15, and outer leads are formed. A side edge 1B which does not coincide with the extension line of the profile line IA of the support lead but extends in the same direction is provided, and punched parts 18 are formed along the four sides of the stage 14 at predetermined interval of the part to become tie bars 17 of the ends 1D of the leads 13 from the ends of the part 12. After heat treatment, placing are executed, a punched part 20 is formed, the bar 17 is cut off to divide the leads 13 to complete an inner lead frame. Thus, the profile lines of the punched regions are so crossed at a predetermined angle as to coincide with each other to prevent punching mark, deformation of the leads, and damage of sequentially feeding molds, thereby enhancing economy.

    MANUFACTURE OF LEAD FRAME
    5.
    发明专利

    公开(公告)号:JPH03181156A

    公开(公告)日:1991-08-07

    申请号:JP32107489

    申请日:1989-12-11

    Abstract: PURPOSE:To prevent occurrence of deformation of a lead and damage of a progressive metal mold by performing processing so that a third region part crosses first and second punch region parts. CONSTITUTION:Four third punch parts 20 forming an outline 1C in the middle of a bar 15 spaced wider than an outline 1A of a support bar 15 crossing a side wall 1B of a second punch part 18 and formed by a first punch region are formed wherein a tie bar 17 provided perpendicularly is cut off, tips 1D of inner leads 13 are formed and gaps between the leads 13 are divided and formed to have a lead frame completed. Thus since outlines of punch regions of respective parts do not align with each other, occurrence of deformation of a lead and damage of a progressive metal mold can be prevented.

    SEMICONDUCTOR DEVICE
    6.
    发明专利

    公开(公告)号:JPH03152963A

    公开(公告)日:1991-06-28

    申请号:JP29306189

    申请日:1989-11-09

    Abstract: PURPOSE:To protect inner leads against deformation and to enable positioning, wire-bonding, and the like to be accurately executed so as to improve a semiconductor device in quality and reliability by a method wherein only the region of a lead frame including the inner leads and a stage is annealed to remove residual stress induced in the lead frame due to the process history. CONSTITUTION:The outer region of a strip material of a lead frame 1 including a dam bar 7 is masked, the strip material is introduced into an annealing oven of high frequency heating type and the region of the lead frame 1 which includes only inner leads 6 and a stage 4 is thermally treated. By this setup, reference pin holes 3, outer leads 8, and dam bars 7 are prevented from being thermally deformed, so that positioning can be accurately executed in assembling and a semiconductor device of this design can be improved in quality and reliability.

    MANUFACTURE OF LEAD FRAME
    7.
    发明专利

    公开(公告)号:JPH03127856A

    公开(公告)日:1991-05-30

    申请号:JP26750289

    申请日:1989-10-13

    Abstract: PURPOSE:To facilitate position confirmation and improve yield, by forming reference pin holes for reference positioning and an indicating part constituted of recesses indicating an allowable region for plating. CONSTITUTION:Reference pin holes 11 for positioning are bored along the longitudinal direction of a belt type material composed of copper-iron alloy, and plating position indicating parts 14 composed of recesseses indicating an allowable region for plating. Then plating is performed according to the plating position indicating part 14 and the reference pin holes 11. After plating, whether the plating position exists inside is judged by visual observation. When the plating position is in contact with the plating position indicating part 14, a plating head is immediately adjusted. Hence failures caused by the deviation of plating position can be kept to a minimum. Thereby positioning is enabled with high precision and yield is increased.

    RESIN SEALED SEMICONDUCTOR DEVICE

    公开(公告)号:JPH08162568A

    公开(公告)日:1996-06-21

    申请号:JP28054993

    申请日:1993-10-13

    Abstract: PURPOSE: To reduce a remaining stress in a member in a connection region of a semiconductor element mounting substrate by a method wherein a calking projection of a a fixing lead is inserted into a through hole of the element mounting substrate to engage the element mounting substrate with the fixing lead. CONSTITUTION: After mount agent 24 having thermal excellent conductivity has beforehand existed in a specific region of a semiconductor element mounting substrate 19 to fix a semiconductor element 11, a calking projection 15a provided in a fixing lead 15 on a lower surface side of a lead frame body is inserted into a through hole 15b provided in this semiconductor element mounting substrate 19 to engage with each other to structure a stacked lead frame 23. Thus, it is possible to obtain a resin sealing semiconductor device that remarkably reduces a remaining stress caused in a member located in a region of the semiconductor element mounting substrate 19, and that further increases connection strength, maintains the positional relationship between a terminal lead 12 and a power source terminal of the semiconductor element with high precision, and that economically has reliability for a long period.

    MANUFACTURING EQUIPMENT OF LEAD FRAME

    公开(公告)号:JPH0758259A

    公开(公告)日:1995-03-03

    申请号:JP22221293

    申请日:1993-08-12

    Abstract: PURPOSE:To lessen handling processes in number so as to protect lead frames against damage caused by handling by a method wherein mounting cages are mounted at a prescribed transfer pitch, and these lines are so linked together as to process lead frames as a whole. CONSTITUTION:A plating line 12 whose transfer direction is opposite to that of a shape forming line 11 is so arranged near to the side of the shape forming line 11 wherein the front and rear of a metal stripe-like material 10 which is formed into lead frames are subjected to etching for forming as to make the downstream part of the shape forming line 11 and the upstream part of the plating line 12 disposed adjacent to each other. The downstream part of the shape forming line 11 and the upstream part of the plating line 12 are directly connected together with a short transfer conveyer into a U shape as a whole. By this setup, an overlap part where an etching process and a pre- plating process partially overlap each other can be dispensed with, and also a complicated handling operation can be dispensed with, so that inner leads or the like can be protected against deformation or damage.

    FACILITY FOR MANUFACTURING SEMICONDUCTOR DEVICE LEAD FRAME

    公开(公告)号:JPH03152962A

    公开(公告)日:1991-06-28

    申请号:JP29306089

    申请日:1989-11-09

    Abstract: PURPOSE:To improve a lead frame in accuracy, quality, and productivity by a method wherein residual stress in a strip material, which is caused by a rolling process and a slitting process and differs at each slit position, is made uniform through the high frequency annealing of the strip material. CONSTITUTION:A metal strip slitted by a slitter 1 is fed to a first annealing device 2. In the device 2, a high frequency is applied to the metal strip in an oxidation preventing atmosphere to heat the whole face of the metal strip by induction heating. By this annealing process, the residual stress induced in the metal strip by a rolling process and a slitting process is removed. Then, the metal strip is formed into a lead frame 11 in continuous form by a first press 3. In succession, by a second annealing device 4, only inner leads 12 and a die pad 15 of the lead frame 11 in continuous form are heated by partial induction heating in the same manner as of the device 2. By this annealing treatment, residual stress induced by the press 3 is removed. Thereafter, the lead frame 11 in continuous form is plated through a plating device 5 and then cut into individual lead frames by a second press 6. By this setup, a lead frame can be made uniform in residual stress and improved in accuracy, quality, and productivity.

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