VARIABLE GAIN AMPLIFIER WITH AUTOBIASING SUPPLY REGULATION
    1.
    发明申请
    VARIABLE GAIN AMPLIFIER WITH AUTOBIASING SUPPLY REGULATION 审中-公开
    具有自动化供应调控的可变增益放大器

    公开(公告)号:WO2003036790A2

    公开(公告)日:2003-05-01

    申请号:PCT/US2002/031859

    申请日:2002-10-04

    Applicant: MOTOROLA, INC.

    CPC classification number: H03F1/3205 H03F1/301 H03F3/19 H03F2200/72 H03G1/0023

    Abstract: A high-gain wide-band RF amplifier (120) with automatic bias supply regulation. Amplifier (120) includes a pair of field effect transistors (FETs) (102, 104) with common source connection (106) biased by FET (108) connected between common source connection (106) and amplifier signal input RFIN. Bias voltage (V B1 ) is applied to the gate of device (108) and automatic gain control voltage (V AGC ) is applied to the gates of FET pair (102, 104). Automatic bias supply circuit (122) is an active load including resistors (124, 126), capacitor (128) and amplifier (130). Capacitor (128) is connected between the negative input (132) and output (134) of amplifier (130). Load reference voltage VO is provided to the positive input. Resistor (124) is connected between output (134) of amplifier (130) and the amplifier output (136) at the drain of FET (104). Resistor (126) is connected between output (136) at the drain of FET (104) and the negative input (132) to amplifier (130) providing amplifier load signal feedback.

    Abstract translation: 高增益宽带射频放大器(120),具有自动偏置电源调节功能。 放大器(120)包括一对具有连接在公共源极连接(106)和放大器信号输入RFIN之间的FET(108)偏置的共同源极连接(106)的场效应晶体管(FET)(102,104)。 偏置电压“VB1”被施加到器件(108)的栅极,并且自动增益控制电压“VAGC”被施加到FET对(102,104)的栅极。 自动偏置电源电路(122)是包括电阻器(124,126),电容器(128)和放大器(130)的有源负载。 电容器(128)连接在放大器(130)的负输入端(132)和输出端(134)之间。 将负载参考电压(VO)提供给正输入。 电阻(124)连接在放大器(130)的输出(134)和FET(104)的漏极处的放大器输出(136)之间。 电阻(126)连接在FET(104)的漏极处的输出(136)和负输入端(132)之间,连接到放大器(130),从而提供放大器负载信号反馈。

    A HIGH PERFORMANCE INTEGRATED CIRCUIT REGULATOR WITH SUBSTRATE TRANSIENT SUPPRESSION
    2.
    发明申请
    A HIGH PERFORMANCE INTEGRATED CIRCUIT REGULATOR WITH SUBSTRATE TRANSIENT SUPPRESSION 审中-公开
    具有基板瞬态抑制的高性能集成电路稳压器

    公开(公告)号:WO2003021637A2

    公开(公告)日:2003-03-13

    申请号:PCT/US2002/027073

    申请日:2002-08-23

    Applicant: MOTOROLA, INC.

    IPC: H01L

    CPC classification number: G05F1/56 H03L7/0891 H03L7/18

    Abstract: A regulation circuit (30), incorporated in a single integrated circuit with a first circuit load, which as an input coupled to a power supply (310) which produces a source voltage, and a first output coupled to the first circuit load. The regulation circuit (30) comprises an input capacitor (109) for reducing the magnitude of a voltage change at the first output, and at least a first voltage regulator (112) for producing a predetermined voltage at the first load.

    Abstract translation: 一种调节电路(30),其结合在具有第一电路负载的单个集成电路中,其作为耦合到产生源极电压的电源(310)的输入以及耦合到第一电路负载的第一输出。 调节电路(30)包括用于减小第一输出端的电压变化幅度的输入电容器(109)和用于在第一负载下产生预定电压的至少第一电压调节器(112)。

    SINGLE ENDED INPUT, DIFFERENTIAL OUTPUT AMPLIFIER
    3.
    发明申请
    SINGLE ENDED INPUT, DIFFERENTIAL OUTPUT AMPLIFIER 审中-公开
    单端输入,差分输出放大器

    公开(公告)号:WO2003021768A1

    公开(公告)日:2003-03-13

    申请号:PCT/US2002/027787

    申请日:2002-09-03

    Applicant: MOTOROLA, INC.

    CPC classification number: H03F3/193

    Abstract: A single ended input differential output amplifier (100) and integrated circuit including an amplifier (100). A pair of load resistors (102, 104) are connected between a supply voltage (Vdd) and differential outputs OUTP and OUTM. An inductor (106) is connected between RFIN and a source bias voltage VBS. A first field effect transistor (FET) (108) is connected between load resistor (102) at output OUTP and inductor (106) at RFIN. A second FET (110) is connected between the second load resistor (104) at output OUTM and the source bias voltage VBS. A gate bias voltage, VBg, is connected to FET (108) through resistor (112) to FET (110). A coupling capacitor (114) is connected between the input RFIN and FET (110). FET (108) may be connected to gate bias voltage VBg through a second gate bias resistor (122).

    Abstract translation: 单端输入差分输出放大器(100)和包括放大器(100)的集成电路。 一对负载电阻(102,104)连接在电源电压(Vdd)和差分输出OUTP和OUTM之间。 电感器(106)连接在RFIN和源极偏置电压VBS之间。 第一场效应晶体管(FET)(108)连接在RFIN处的输出OUTP的负载电阻(102)和电感(106)之间。 第二FET(110)在输出OUTM处连接在第二负载电阻(104)和源极偏置电压VBS之间。 栅极偏置电压VBg通过电阻(112)连接到FET(108)至FET(110)。 耦合电容器(114)连接在输入RFIN和FET(110)之间。 FET(108)可以通过第二栅极偏置电阻(122)连接到栅极偏置电压VBg。

    WIRELESS POWERED COMMUNICATION DEVICE USING POWER SIGNAL SAMPLING AND METHOD
    4.
    发明申请
    WIRELESS POWERED COMMUNICATION DEVICE USING POWER SIGNAL SAMPLING AND METHOD 审中-公开
    使用功率信号采样和方法的无线供电通信设备

    公开(公告)号:WO1998009411A1

    公开(公告)日:1998-03-05

    申请号:PCT/US1997015192

    申请日:1997-08-28

    Applicant: MOTOROLA INC.

    Abstract: A circuit (34) for data recovery in a wireless powered communication device (10) obviates the need for the costly high power consumption filters of prior art devices by deriving a clock signal from the power coil (18), and then sampling the data coil (20) signal with the derived sampling clock. The step of deriving a clock signal from the power signal causes the component of the power signal present on the data signal to be aliased to DC which is then easily rejected with a low order high pass or bandpass filter (38). Furthermore, the data signal may be amplified to a desired level suitable for amplitude discrimination by a simple comparator circuit (40) with hysteresis. Demodulation of the data signal is easily accomplished in the digital domain using a digital demodulator (32).

    Abstract translation: 用于在无线供电通信设备(10)中进行数据恢复的电路(34)通过从功率线圈(18)导出时钟信号,从而消除对现有技术设备的昂贵的大功耗滤波器的需要,然后对数据线圈 (20)信号与导出采样时钟。 从功率信号导出时钟信号的步骤使得存在于数据信号上的功率信号的分量被混叠到DC,然后被低阶高通或带通滤波器(38)容易地拒绝。 此外,可以通过具有滞后的简单比较器电路(40)将数据信号放大到适合于幅度鉴别的期望电平。 使用数字解调器(32)在数字域中容易地实现数据信号的解调。

    A HIGH PERFORMANCE INTEGRATED CIRCUIT REGULATOR WITH SUBSTRATE TRANSIENT SUPPRESSION
    6.
    发明公开
    A HIGH PERFORMANCE INTEGRATED CIRCUIT REGULATOR WITH SUBSTRATE TRANSIENT SUPPRESSION 审中-公开
    具有基极瞬态抑制的高性能集成电路调节器

    公开(公告)号:EP1436826A2

    公开(公告)日:2004-07-14

    申请号:EP02768704.5

    申请日:2002-08-23

    Applicant: MOTOROLA, INC.

    CPC classification number: G05F1/56 H03L7/0891 H03L7/18

    Abstract: A regulation circuit (30), incorporated in a single integrated circuit with a first circuit load, which as an input coupled to a power supply (310) which produces a source voltage, and a first output coupled to the first circuit load. The regulation circuit (30) comprises an input capacitor (109) for reducing the magnitude of a voltage change at the first output, and at least a first voltage regulator (112) for producing a predetermined voltage at the first load.

    Abstract translation: 调节电路(30)与第一电路负载并入单个集成电路中,所述调节电路(30)作为耦合到产生源电压的电源(310)的输入和耦合到第一电路负载的第一输出。 调节电路(30)包括用于减小第一输出端处的电压变化的大小的输入电容器(109)以及用于在第一负载处产生预定电压的至少第一电压调节器(112)。

    SIGNAL CONDITIONING CIRCUIT INCLUDING A COMBINED ADC/DAC, SENSOR SYSTEM, AND METHOD THEREFOR
    7.
    发明公开
    SIGNAL CONDITIONING CIRCUIT INCLUDING A COMBINED ADC/DAC, SENSOR SYSTEM, AND METHOD THEREFOR 无效
    期组合ADC / DAC转换器,传感器系统及其方法信号调理电路

    公开(公告)号:EP0980601A1

    公开(公告)日:2000-02-23

    申请号:EP98964175.8

    申请日:1998-12-18

    Applicant: MOTOROLA, INC.

    Abstract: An electronically calibrated sensor (100) includes a sensing element (102) with an output coupled to a signal conditioning circuit (104). The signal conditioning circuit (104) is adapted to be highly computationally efficient and operable for compensating for temperature and part-to-part variation on the sensing element output for providing a useable sensor output signal. The signal conditioning circuit (104) includes an analog-to-digital/digital-to-analog (ADC/DAC) conversion device (112). The ADC/DAC (112) is operable to perform both analog input signal analog-to-digital conversion and digital output signal digital-to-analog conversion. The ADC/DAC (112) is further adapted to provide analog control signals to input signal conditioning circuits (104, 106).

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