Abstract:
A high-gain wide-band RF amplifier (120) with automatic bias supply regulation. Amplifier (120) includes a pair of field effect transistors (FETs) (102, 104) with common source connection (106) biased by FET (108) connected between common source connection (106) and amplifier signal input RFIN. Bias voltage (V B1 ) is applied to the gate of device (108) and automatic gain control voltage (V AGC ) is applied to the gates of FET pair (102, 104). Automatic bias supply circuit (122) is an active load including resistors (124, 126), capacitor (128) and amplifier (130). Capacitor (128) is connected between the negative input (132) and output (134) of amplifier (130). Load reference voltage VO is provided to the positive input. Resistor (124) is connected between output (134) of amplifier (130) and the amplifier output (136) at the drain of FET (104). Resistor (126) is connected between output (136) at the drain of FET (104) and the negative input (132) to amplifier (130) providing amplifier load signal feedback.
Abstract:
A regulation circuit (30), incorporated in a single integrated circuit with a first circuit load, which as an input coupled to a power supply (310) which produces a source voltage, and a first output coupled to the first circuit load. The regulation circuit (30) comprises an input capacitor (109) for reducing the magnitude of a voltage change at the first output, and at least a first voltage regulator (112) for producing a predetermined voltage at the first load.
Abstract:
A single ended input differential output amplifier (100) and integrated circuit including an amplifier (100). A pair of load resistors (102, 104) are connected between a supply voltage (Vdd) and differential outputs OUTP and OUTM. An inductor (106) is connected between RFIN and a source bias voltage VBS. A first field effect transistor (FET) (108) is connected between load resistor (102) at output OUTP and inductor (106) at RFIN. A second FET (110) is connected between the second load resistor (104) at output OUTM and the source bias voltage VBS. A gate bias voltage, VBg, is connected to FET (108) through resistor (112) to FET (110). A coupling capacitor (114) is connected between the input RFIN and FET (110). FET (108) may be connected to gate bias voltage VBg through a second gate bias resistor (122).
Abstract:
A circuit (34) for data recovery in a wireless powered communication device (10) obviates the need for the costly high power consumption filters of prior art devices by deriving a clock signal from the power coil (18), and then sampling the data coil (20) signal with the derived sampling clock. The step of deriving a clock signal from the power signal causes the component of the power signal present on the data signal to be aliased to DC which is then easily rejected with a low order high pass or bandpass filter (38). Furthermore, the data signal may be amplified to a desired level suitable for amplitude discrimination by a simple comparator circuit (40) with hysteresis. Demodulation of the data signal is easily accomplished in the digital domain using a digital demodulator (32).
Abstract:
A regulation circuit (30), incorporated in a single integrated circuit with a first circuit load, which as an input coupled to a power supply (310) which produces a source voltage, and a first output coupled to the first circuit load. The regulation circuit (30) comprises an input capacitor (109) for reducing the magnitude of a voltage change at the first output, and at least a first voltage regulator (112) for producing a predetermined voltage at the first load.
Abstract:
An electronically calibrated sensor (100) includes a sensing element (102) with an output coupled to a signal conditioning circuit (104). The signal conditioning circuit (104) is adapted to be highly computationally efficient and operable for compensating for temperature and part-to-part variation on the sensing element output for providing a useable sensor output signal. The signal conditioning circuit (104) includes an analog-to-digital/digital-to-analog (ADC/DAC) conversion device (112). The ADC/DAC (112) is operable to perform both analog input signal analog-to-digital conversion and digital output signal digital-to-analog conversion. The ADC/DAC (112) is further adapted to provide analog control signals to input signal conditioning circuits (104, 106).