公开(公告)号：WO2003052951A1

公开(公告)日：2003-06-26

申请号：PCT/US2002/037339

申请日：2002-11-21

Applicant: MOTOROLA, INC.

Inventor： YU, Shan, ,  STEWART, Daniel

IPC: H04B1/66

CPC classification number: H04N19/196 ,  H04N7/188 ,  H04N19/198 ,  H04N19/48 ,  H04N19/503 ,  H04N19/51 ,  H04N19/90

Abstract: A receiver locates command data from the compressed video sequence (120). A detector detects a change in the command data to indicate motion (150). The detector detects change in the quantization factor to indicate motion according to an embodiment. The receiver locates the command data from the compressed video sequence by obtaining synchronization information to locate known position in the video sequence and by parsing until finding the desired command data field according to an embodiment. This command data located by the receiver indicates the quantization factor of the compressed video sequence. Both the receiver and the detector can operate in real time on the compressed video sequence.

Abstract translation: 接收器定位来自压缩视频序列120的命令数据。检测器检测命令数据的改变以指示运动150.根据实施例，检测器检测量化因子中的改变以指示运动。 接收器通过获得同步信息来定位来自压缩视频序列的命令数据，以定位视频序列中的已知位置，并通过解析直到找到所需的命令数据字段。 由接收器定位的该命令数据指示压缩视频序列的量化因子。 接收机和检测器都可以在压缩视频序列上实时操作。

公开(公告)号：WO2003013071A1

公开(公告)日：2003-02-13

申请号：PCT/US2002/022178

申请日：2002-07-13

Applicant: MOTOROLA, INC.

Inventor： MANSOURI, Mack ,  STEWART, Daniel ,  ROSSI, Steven

IPC: H04L12/54

CPC classification number: H04N21/226 ,  H04N21/236

Abstract: A format programmable hardware packetizer (110) receives real-time raw input data (125) from a multimedia data source (103) via an analog to digital converter (105) and a data encoder (120) gated by encoder interrupts (127). The real-time raw input data is buffered in an internal byte collector of the packetizer (110). A main CPU interrupt (117) is issued to the main processor (130) when a packet boundary code is received. The packetizer (110) formats the data according to a desired format selected on line (115) for dump to the main memory (140) while providing a managed, much lower level of interrupts to the main processor (130) on the CPU interrupt line (117). A plurality of hardware packetizers (110) can be deployed according to alternative constructions for efficient real time packetizing in various selected formats.

Abstract translation: 格式可编程硬件分组器（110）经由模数转换器（105）和由编码器中断（127）门控的数据编码器（120）从多媒体数据源（103）接收实时原始输入数据（125）。 实时原始输入数据被缓存在打包器（110）的内部字节收集器中。 当接收到分组边界码时，主CPU中断（117）被发送到主处理器（130）。 打包器（110）根据在线（115）上选择的期望格式将数据格式化，以转储到主存储器（140），同时向CPU中断线上的主处理器（130）提供被管理的，低得多的中断级别 （117）。 可以根据替代结构部署多个硬件打包器（110），以便以各种选择的格式进行有效的实时打包。