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    METHOD AND SYSTEM FOR CONTROLLING ACCESS TO A CHANNEL
    1.
    发明公开
    METHOD AND SYSTEM FOR CONTROLLING ACCESS TO A CHANNEL 失效
    VERFAHREN UND SYSTEM ZUR ZUGRIFFSSTEUERUNG AUF EINEN KANAL

    公开(公告)号：EP0752182A4

    公开(公告)日：1999-12-15

    申请号：EP95940539

    申请日：1995-10-25

    Applicant: MOTOROLA INC

    Inventor： MEDENDORP DALE FREDERICK ,  BURKE TIMOTHY MARK ,  VILMUR PAUL LOUIS ,  CORRIGAN RICHARD JAMES ,  FREYMAN PHILLIP KENT

    IPC: H04L12/28 ,  H04M11/00 ,  H04M19/08 ,  H04N7/10 ,  H04N7/16

    CPC classification number: H04M19/08 ,  H04L12/2801 ,  H04M11/00 ,  H04N7/10 ,  H04N7/16 ,  Y02D70/00

    Abstract: The present invention provides a method and apparatus for controlling power consumption and access to telephone channels (36) in a cable telephony system (10). The system (10) has two subsystems for limiting power and access, one, when a telephone (40) is waiting to receive a call and a second when a subscriber wants to place a call. The telephone (40) is usually waiting for a telephone call. The first subsystem reduces power consumption by having a transceiver (114) for the telephone (40) only monitor for incoming calls periodically and turns off the transceiver (114) when not monitoring for calls. The second subsystem, limits system power consumption and access to channels (36) by only allowing loop current and access to channels (36) when a channel (36) is available for use. These two subsystems reduce the system power consumption and regulate the access to the telephone channels (36).

    Abstract translation: 本发明提供了一种用于控制功率消耗和访问有线电话系统（10）中的电话信道（36）的方法和装置。 系统（10）具有用于限制功率和接入的两个子系统，一个当电话（40）等待接收呼叫时，另一个子系统，当用户想要进行呼叫时，系统（10）具有两个子系统。 电话（40）通常正在等待电话。 第一子系统通过使用于电话（40）的收发器（114）仅在不监视呼叫的情况下周期性地监视来电并关闭收发器（114）来降低功耗。 第二子系统通过在通道（36）可供使用时仅允许回路电流和通道（36）的访问来限制系统功耗和对通道（36）的访问。 这两个子系统降低系统功耗并调节对电话通道的访问（36）。

    GENERAL PURPOSE DATA CONTROL TERMINAL.
    2.
    发明公开
    GENERAL PURPOSE DATA CONTROL TERMINAL. 失效
    数据控制终端一般用途。

    公开(公告)号：EP0116064A4

    公开(公告)日：1985-02-18

    申请号：EP83902479

    申请日：1983-06-24

    Applicant: MOTOROLA INC

    Inventor： BURKE TIMOTHY MARK

    IPC: H04B1/10 ,  H04B20060101 ,  H04B1/00 ,  H04B7/26 ,  H04W76/02 ,  H04W84/10 ,  H04W88/16 ,  H04W88/18 ,  H04Q7/00

    CPC classification number: H04W88/185 ,  G06K13/0825 ,  H04W76/02 ,  H04W84/10

    Abstract: A wireless communication system (Fig. 1) and station (60, 62 & 64) for use therein, having means for receiving a command packet (Fig. 2) comprising: an address field (bits 0-15) containing a station address; an operation code field (bits 24-28) containing a code at least partly specifying an operation to be performed by said addressed station; and an argument field (bits 16-23) containing an argument used to further and fully specify, together with the operation code in the same command packet, said operation when said operation code only partly specifies said operation and is capable of conveying data or status information when said operation fully specifies said operation, whereby said operation may be determined by said operation code in conjunction with said argument when said argument is used to further specify said operation, and means for performing said operation specified in said received command packet only when portions of said addressed station's address match corresponding portions indicated in the received address.

    Methods and apparatus for processing burst signals in a telecommunications system
    7.
    发明专利
    Methods and apparatus for processing burst signals in a telecommunications system 未知

    公开(公告)号：GB2313991A

    公开(公告)日：1997-12-10

    申请号：GB9719248

    申请日：1996-12-21

    Applicant: MOTOROLA INC

    Inventor： BURKE TIMOTHY MARK

    IPC: H04L7/033 ,  H04L27/227 ,  H03D3/00 ,  H04L7/00

    Abstract: A control unit (102) efficiently decodes burst signal transmissions in a TDMA based telecommunication system (100) by decimating down the number of samples requiring processing during symbol detection. The control unit (102) includes a sampling receiver (304) that inputs burst signals from cable access units, converts them to a pair of baseband quadrature signals, I and Q. fThe sampling receiver (304) also includes an A/D converter (314) that samples the I and Q signals at preferably four times the symbol rate. A digital signal processor circuit (306) produces a timing error signal for substantially all of the samples. The digital processor circuit (306) also accumulates a timing error sum for each of the four samples. The processor circuit (306) selects the optimum sample between the samples having the largest positive and negative error sums. The processor circuit (306) also includes a * small Greek pi */4-DQPSK differential detector that processes the optimum sample of each symbol for symbol detection.

    8.
    发明专利
    未知

    公开(公告)号：DK170082B1

    公开(公告)日：1995-05-15

    申请号：DK170484

    申请日：1984-03-28

    Applicant: MOTOROLA INC

    Inventor： BURKE TIMOTHY MARK ,  FREEBURG THOMAS ARTHUR ,  KREBS JAY ROBERT ,  NOBLE SCOTT WILLIAM

    IPC: H04B1/10 ,  H04B7/26 ,  H04M7/04 ,  H04W88/02 ,  H04Q7/00 ,  H04B1/00

    Abstract: A data signalling system for transmitting signals between at least one primary station and a plurality of secondary stations. The system is well adapted for use in multiple unit radio communications systems capable of noise and data communications. A register model is utilized which permits a highly flexible signalling system compatable with a wide range of communications networks. Data transfer is accomplished using fixed length data packets which are error correction encoded and transmitted utilizing PSK modulation.

    INTERNALLY REGISTER MODELLED,SERIALLY-BUSSED RADIO SYSTEM
    9.
    发明专利
    INTERNALLY REGISTER MODELLED,SERIALLY-BUSSED RADIO SYSTEM 未知

    公开(公告)号：HK11894A

    公开(公告)日：1994-02-18

    申请号：HK11894

    申请日：1994-02-08

    Applicant: MOTOROLA INC

    Inventor： BURKE TIMOTHY MARK ,  SMITH PAUL FIELDING ,  SCHORMAN ERIC REED

    IPC: H04B1/40 ,  H04B7/00 ,  H04L29/02 ,  H04L29/06

    Abstract: In accordance with the present invention, there is provided a register-modelled radio system comprising a plurality of register-modelled processors having addressable registers for modelling the virtual state of the processor; a serial bus, interconnecting the register-modelled processors for communicating between the addressable registers; and a communications protocol for passing information to or from the addressable registers, whereby the virtual state of a radio portion may be determined or altered by, respectively, communicating information from or to the addressable registers. The communications protocol further comprises an information packet having an address, an operation code, optional data, and an error detection device, such as a cyclical redundancy check packet. The operation code is chosed from the group of primitive operation codes reset, read, write, bit set, bit clear, acknowledge, and negative acknowledge.

    10.
    发明专利
    未知

    公开(公告)号：NO173799B

    公开(公告)日：1993-10-25

    申请号：NO841207

    申请日：1984-03-27

    Applicant: MOTOROLA INC

    Inventor： BURKE TIMOTHY MARK ,  LYNK JR CHARLES NELSON ,  NOBLE SCOTT WILLIAM

    IPC: H04B7/26 ,  H04M7/04 ,  H04B1/10 ,  H04W84/04

    Abstract: A general purpose data control and information system (30-64) particularly well adapted for multiple unit (60-64) radio communications providing reliable enhancement to normal voice systems. The system provides addressing capability (Fig. 2, bits 0-15), along with data transfer (Fig. 3) and utilizes handshake and retransmisssion protocol to enhance flexibility and reliability. The system utilizes fixed length signalling packets (Figs. 2 and 3) with error correction encoding, to permit data transfer, transmitter identification and control and status monitoring.

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