公开(公告)号：BR8207237A

公开(公告)日：1983-03-15

申请号：BR8207237

申请日：1982-03-03

Applicant: MOTOROLA INC

Inventor： KRAUL DOUGLAS ROBERT ,  MARSHAL JAMES WADE

IPC: H04L7/08 ,  H04L7/033 ,  H04L7/04 ,  H04W88/02

Abstract: A signal synchronization system is disclosed which samples an incoming stream containing binary information at a sampling rate which is an integral multiple of the bit information rate. This system correlates the sequences of the sampled bit pattern with a predetermined sequence to produce a measure of the dissimilarity between the sampled and the predetermined sequences. Synchronization of a local sampling clock with the incoming binary information is achieved by making phase adjustments to the local sampling clock which are functions of both the magnitude of dissimilarity and the time of measurement.

公开(公告)号：BR8108824A

公开(公告)日：1982-08-24

申请号：BR8108824

申请日：1981-08-31

Applicant: MOTOROLA INC

Inventor： DAVIS WALTER LEE ,  KRAUL DOUGLAS ROBERT

IPC: G11C17/00 ,  G11C5/00 ,  G11C8/00 ,  G11C8/10 ,  G11C11/34 ,  G11C11/40 ,  G11C11/413

Abstract: A memory system is used to store data and is powered-up by and only during accessing signals, thus using essentially no current when not being accessed. The memory system includes a decoding network using a mixture of NPN and PNP transistors, and a buffer circuit at the input to a memory cell array allows the use of a minimum number of select lines, having low power requirements.

公开(公告)号：DE3272413D1

公开(公告)日：1986-09-11

申请号：DE3272413

申请日：1982-03-03

Applicant: MOTOROLA INC

Inventor： KRAUL DOUGLAS ROBERT ,  MARSHALL JAMES WADE

IPC: H04L7/08 ,  H04L7/033 ,  H04L7/04 ,  H04W88/02

Abstract: A signal synchronization system is disclosed which samples an incoming stream containing binary information at a sampling rate which is an integral multiple of the bit information rate. This system correlates the sequences of the sampled bit pattern with a predetermined sequence to produce a measure of the dissimilarity between the sampled and the predetermined sequences. Synchronization of a local sampling clock with the incoming binary information is achieved by making phase adjustments to the local sampling clock which are functions of both the magnitude of dissimilarity and the time of measurement.

公开(公告)号：MX152509A

公开(公告)日：1985-08-14

申请号：MX18942681

申请日：1981-09-30

Applicant: MOTOROLA INC

Inventor： DAVIS WALTER LEE ,  KRAUL DOUGLAS ROBERT

IPC: G11C5/00 ,  G11C17/00 ,  G11C8/00 ,  G11C8/10 ,  G11C11/34 ,  G11C11/40 ,  G11C11/413 ,  G11C5/02

Abstract: A memory system is used to store data and is powered-up by and only during accessing signals, thus using essentially no current when not being accessed. The memory system includes a decoding network using a mixture of NPN and PNP transistors, and a buffer circuit at the input to a memory cell array allows the use of a minimum number of select lines, having low power requirements.

公开(公告)号：ZA816032B

公开(公告)日：1982-12-29

申请号：ZA816032

申请日：1981-08-31

Applicant: MOTOROLA INC

Inventor： DAVIS WALTER LEE ,  KRAUL DOUGLAS ROBERT

IPC: G11C5/00 ,  G11C17/00 ,  G11C8/00 ,  G11C8/10 ,  G11C11/34 ,  G11C11/40 ,  G11C11/413

Abstract: A memory system is used to store data and is powered-up by and only during accessing signals, thus using essentially no current when not being accessed. The memory system includes a decoding network using a mixture of NPN and PNP transistors, and a buffer circuit at the input to a memory cell array allows the use of a minimum number of select lines, having low power requirements.

公开(公告)号：IT8149392D0

公开(公告)日：1981-09-29

申请号：IT4939281

申请日：1981-09-29

Applicant: MOTOROLA INC

Inventor： DAVIS WALTER LEE ,  KRAUL DOUGLAS ROBERT

IPC: G11C17/00 ,  G11C5/00 ,  G11C8/00 ,  G11C8/10 ,  G11C11/34 ,  G11C11/40 ,  G11C11/413 ,  G06F

Abstract: A memory system is used to store data and is powered-up by and only during accessing signals, thus using essentially no current when not being accessed. The memory system includes a decoding network using a mixture of NPN and PNP transistors, and a buffer circuit at the input to a memory cell array allows the use of a minimum number of select lines, having low power requirements.

公开(公告)号：AT46980T

公开(公告)日：1989-10-15

申请号：AT81902527

申请日：1981-08-31

Applicant: MOTOROLA INC

Inventor： DAVIS WALTER LEE ,  KRAUL DOUGLAS ROBERT

IPC: G11C11/40

公开(公告)号：HK7489A

公开(公告)日：1989-02-03

申请号：HK7489

申请日：1989-01-26

Applicant: MOTOROLA INC

Inventor： KRAUL DOUGLAS ROBERT ,  MARSHALL JAMES WADE

IPC: H04L7/08

公开(公告)号：DE3177112D1

公开(公告)日：1989-11-09

申请号：DE3177112

申请日：1981-08-31

Applicant: MOTOROLA INC

Inventor： DAVIS WALTER LEE ,  KRAUL DOUGLAS ROBERT

IPC: G11C17/00 ,  G11C5/00 ,  G11C8/00 ,  G11C8/10 ,  G11C11/34 ,  G11C11/40 ,  G11C11/413

Abstract: A memory system is used to store data and is powered-up by and only during accessing signals, thus using essentially no current when not being accessed. The memory system includes a decoding network using a mixture of NPN and PNP transistors, and a buffer circuit at the input to a memory cell array allows the use of a minimum number of select lines, having low power requirements.

公开(公告)号：IT1172202B

公开(公告)日：1987-06-18

申请号：IT4939281

申请日：1981-09-29

Applicant: MOTOROLA INC

Inventor： DAVIS WALTER LEE ,  KRAUL DOUGLAS ROBERT

IPC: G11C17/00 ,  G11C5/00 ,  G11C8/00 ,  G11C8/10 ,  G11C11/34 ,  G11C11/40 ,  G11C11/413 ,  G06F

Abstract: A memory system is used to store data and is powered-up by and only during accessing signals, thus using essentially no current when not being accessed. The memory system includes a decoding network using a mixture of NPN and PNP transistors, and a buffer circuit at the input to a memory cell array allows the use of a minimum number of select lines, having low power requirements.