Method and apparatus, and computer program for producing filter coefficients forequalizers

    公开(公告)号:AU6396000A

    公开(公告)日:2001-03-05

    申请号:AU6396000

    申请日:2000-08-02

    Applicant: MOTOROLA INC

    Abstract: Apparatus, computer program, and method for producing filter coefficients for an equalizer, the method includes the steps of: estimating a response (810) of a communication channel to a signaling pulse; estimating an autocorrelation (820) of noise and interference of the communication channel; computing an array (830) based on the estimation of the response of the communication channel to the signaling pulse and the estimation of the autocorrelation of the noise and interference of the communication channel; designating (840) at least one pivot position in the array; recursively performing the steps of: transforming the array (850) by a sequence of operations; storing (860) at least one element of the at least one pivot position; shifting (870) the at least one element of the at least one pivot position, thereby providing a shifted transformed array; determining (890) whether the shifted transformed array contains at least one non-zero element; and calculating (880) the filter coefficients based on the stored at least one element and the estimation of the response of the communication channel.

    Method and apparatus for mapping bits to an information burst

    公开(公告)号:AU5173800A

    公开(公告)日:2000-12-18

    申请号:AU5173800

    申请日:2000-05-31

    Applicant: MOTOROLA INC

    Abstract: A first group of bits (100, 102, 106), e.g., header symbols/bits, are interleaved to form a first group of interleaved bits. A second group of bits (104), e.g., data symbols/bits, are interleaved to form a second group of interleaved bits. The first and second groups of interleaved bits are mapped to an information burst (114). The first and second groups of interleaved bits may be mapped to the information burst relative to a group of known symbols (116) forming a training sequence. A disadvantaged bit location, i.e., a bit location within the mapping having a relative high probability of incurring a bit error, is identified and an advantaged bit location, i.e., a bit location within the mapping having a relatively low probability of incurring a bit error, is identified. A first group bit from the first group of interleaved bits mapped to the disadvantaged bit location is remapped to the advantaged bit location while a second group bit from the second group of interleaved bits mapped to the advantaged bit location is remapped to the disadvantaged bit location.

    METHOD AND APPARATUS FOR MAPPING BITS TO AN INFORMATION BURST
    4.
    发明申请
    METHOD AND APPARATUS FOR MAPPING BITS TO AN INFORMATION BURST 审中-公开
    将信息映射到信息冲突的方法和装置

    公开(公告)号:WO0074296A8

    公开(公告)日:2001-05-31

    申请号:PCT/US0014893

    申请日:2000-05-31

    Applicant: MOTOROLA INC

    Abstract: A first group of bits (100, 102, 106) e.g., header symbols/bits, are interleaved to form a first group of interleaved bits. A second group of bits (104), e.g., data symbols/bits, are interleaved to form a second group of interleaved bits. The first and second groups of interleaved bits are mapped to an information burst (114). The first and second groups of interleaved bits may be mapped to the information burst relative to a group of known symbols (116) forming a training sequence. A disadvantaged bit location, i.e., a bit location within the mapping having a relative high probability of incurring a bit error, is identified and an advantaged bit location, i.e., a bit location within the mapping having a relatively low probability of incurring a bit error, is identified. A first group bit from the first group of interleaved bits mapped to the disadvantaged bit location is remapped to the advantaged bit location while a second group bit from the second group of interleaved bits mapped to the advantaged bit location is remapped to the disadvantaged bit location.

    Abstract translation: 例如头部符号/比特的第一组比特(100,102,106)被交织以形成第一组交织比特。 第二组比特(104),例如数据符号/比特被交织以形成第二组交织比特。 第一和第二组交错比特被映射到信息突发(114)。 第一和第二组交错比特可以相对于形成训练序列的一组已知符号(116)被映射到信息突发。 识别处于不利位置的位置,即具有相对较高的出现错误概率的映射内的位位置,并且有利的位位置,即映射内的位位置具有相对较低的发生位错误的概率 ,被识别。 映射到处于不利位置的位置的第一组交错比特的第一组比特被重新映射到优势比特位置,而来自映射到优势比特位置的第二组交织比特的第二组比特重新映射到处于不利位的比特位置。

    METHOD AND APPARATUS FOR MAPPING BITS TO AN INFORMATION BURST
    5.
    发明公开
    METHOD AND APPARATUS FOR MAPPING BITS TO AN INFORMATION BURST 有权
    VERFAHREN UND VORRICHTUNG ZUR ABBILDUNG VON BITS AUF EININFORMATIONSBÜNDEL

    公开(公告)号:EP1101314A4

    公开(公告)日:2006-04-12

    申请号:EP00936419

    申请日:2000-05-31

    Applicant: MOTOROLA INC

    Abstract: A first group of bits (100, 102, 106) e.g., header symbols/bits, are interleaved to form a first group of interleaved bits. A second group of bits (104), e.g., data symbols/bits, are interleaved to form a second group of interleaved bits. The first and second groups of interleaved bits are mapped to an information burst (114). The first and second groups of interleaved bits may be mapped to the information burst relative to a group of known symbols (116) forming a training sequence. A disadvantaged bit location, i.e., a bit location within the mapping having a relative high probability of incurring a bit error, is identified and an advantaged bit location, i.e., a bit location within the mapping having a relatively low probability of incurring a bit error, is identified. A first group bit from the first group of interleaved bits mapped to the disadvantaged bit location is remapped to the advantaged bit location while a second group bit from the second group of interleaved bits mapped to the advantaged bit location is remapped to the disadvantaged bit location.

    Abstract translation: 第一比特组(100,102,106),例如头部符号/比特被交织以形成第一组交织比特。 第二组比特(104),例如数据符号/比特,被交织以形成第二组交织比特。 第一和第二组交织比特被映射到信息突发(114)。 第一和第二组交错比特可以相对于形成训练序列的一组已知符号(116)被映射到信息突发。 识别弱势比特位置,即具有相对较高的发生比特错误概率的映射内的比特位置,并且有利的比特位置,即映射内的比特位置具有相对较低的发生比特误差的概率 ,被识别。 映射到处于不利位置的位置的第一组交错比特的第一组比特重新映射到优势比特位置,而来自映射到优势比特位置的第二组交织比特的第二组比特重新映射到处于不利位的比特位置。

Patent Agency Ranking