ASYNCHRONOUS/SYNCHRONOUS DATA RECEIVER CIRCUIT

    公开(公告)号:GB2182828B

    公开(公告)日:1989-10-04

    申请号:GB8625931

    申请日:1986-10-30

    Applicant: MOTOROLA INC

    Abstract: In a communications system wherein a transmitted message is preceeded only by an address, an asynchronous circuit detects the address and provides an initializing signal to a synchronous clock recovery circuit so that the first bit of the recovered clock signal is synchronized to the first bit of the message. During the transmission of the message the synchronous clock recovery circuit makes minor adjustments to the phase of the recovered clock to maintain synchronization between the recovered clock and the message. At the termination of the message, the synchronous clock recovery circuit is inhibited until the asynchronous circuit detects another address.

    MULTILINGUAL PAGING SYSTEM
    2.
    发明专利

    公开(公告)号:GB2197103B

    公开(公告)日:1991-03-06

    申请号:GB8720545

    申请日:1987-09-01

    Applicant: MOTOROLA INC

    Abstract: A communication system and in particular a paging system for transmitting information includes a keyboard, an encoder, a transmitter, a paging, the paging receiver comprising, a decoder, a microprocessor, and a display. Entered information includes a plurality of languages and a corresponding language select signal, each language comprised of a plurality of characters. To increase throughput, the language characters are compressed by the encoder to a common set of characters. The information including the languages is transmitted to a plurality of selectable paging receivers. The paging receiver decodes the information and converts the transmitted received characters to corresponding language symbols according to the transmitted received language select signal. The language symbols are then displayed on the display.

    ASYNCHRONOUS/SYNCHRONOUS DATA RECEIVER CIRCUIT

    公开(公告)号:AU582023B2

    公开(公告)日:1989-03-09

    申请号:AU6414086

    申请日:1986-10-17

    Applicant: MOTOROLA INC

    Abstract: In a communications system wherein a transmitted message is preceeded only by an address, an asynchronous circuit detects the address and provides an initializing signal to a synchronous clock recovery circuit so that the first bit of the recovered clock signal is synchronized to the first bit of the message. During the transmission of the message the synchronous clock recovery circuit makes minor adjustments to the phase of the recovered clock to maintain synchronization between the recovered clock and the message. At the termination of the message, the synchronous clock recovery circuit is inhibited until the asynchronous circuit detects another address.

    MULTILINGUAL PAGING SYSTEM
    4.
    发明专利

    公开(公告)号:GB2197103A

    公开(公告)日:1988-05-11

    申请号:GB8720545

    申请日:1987-09-01

    Applicant: MOTOROLA INC

    Abstract: A communication system and in particular a paging system for transmitting information includes a keyboard, an encoder, a transmitter, a paging, the paging receiver comprising, a decoder, a microprocessor, and a display. Entered information includes a plurality of languages and a corresponding language select signal, each language comprised of a plurality of characters. To increase throughput, the language characters are compressed by the encoder to a common set of characters. The information including the languages is transmitted to a plurality of selectable paging receivers. The paging receiver decodes the information and converts the transmitted received characters to corresponding language symbols according to the transmitted received language select signal. The language symbols are then displayed on the display.

    ASYNCHRONOUS/SYNCHRONOUS DATA RECEIVER CIRCUIT

    公开(公告)号:GB2182828A

    公开(公告)日:1987-05-20

    申请号:GB8625931

    申请日:1986-10-30

    Applicant: MOTOROLA INC

    Abstract: In a communications system wherein a transmitted message is preceeded only by an address, an asynchronous circuit detects the address and provides an initializing signal to a synchronous clock recovery circuit so that the first bit of the recovered clock signal is synchronized to the first bit of the message. During the transmission of the message the synchronous clock recovery circuit makes minor adjustments to the phase of the recovered clock to maintain synchronization between the recovered clock and the message. At the termination of the message, the synchronous clock recovery circuit is inhibited until the asynchronous circuit detects another address.

    ASYNCHRONOUS/SYNCHRONOUS DATA RECEIVER CIRCUIT

    公开(公告)号:AU6414086A

    公开(公告)日:1987-05-14

    申请号:AU6414086

    申请日:1986-10-17

    Applicant: MOTOROLA INC

    Abstract: In a communications system wherein a transmitted message is preceeded only by an address, an asynchronous circuit detects the address and provides an initializing signal to a synchronous clock recovery circuit so that the first bit of the recovered clock signal is synchronized to the first bit of the message. During the transmission of the message the synchronous clock recovery circuit makes minor adjustments to the phase of the recovered clock to maintain synchronization between the recovered clock and the message. At the termination of the message, the synchronous clock recovery circuit is inhibited until the asynchronous circuit detects another address.

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