公开(公告)号：WO1981001482A1

公开(公告)日：1981-05-28

申请号：PCT/US1980001366

申请日：1980-10-14

Applicant: MOTOROLA INC

Inventor： MOTOROLA INC ,  MOENCH J

IPC: G11C08/00

CPC classification number: H03K19/096 ,  G11C11/4085 ,  G11C17/12

Abstract: Quiet row select circuit for holding unselected word lines or row select lines in a memory array at a predetermined voltage potential. Transistors (34), (35), (36), (37) are used to couple each row select line (R0), (R2), (R3) to the predetermined voltage potential wherein for adjacent row select lines at least one of the adjacent select lines is always coupled to the predetermined voltage when in an unselected state. A transistor (31) or (32) is also used to couple each of the adjacent row select lines together and this transistor is enabled whenever the adjacent row select lines are non-selected so that both row select lines are coupled together to the predetermined voltage level.

Abstract translation: 安静的行选择电路，用于在预定电压电位下将未选字线或行选择线保持在存储器阵列中。 晶体管（34），（35），（36），（37）用于将每行选择线（R0），（R2），（R3）耦合到预定的电压电位，其中对于相邻的行选择线， 当处于未选择状态时，相邻的选择线总是耦合到预定电压。 晶体管（31）或（32）也用于将每个相邻行选择线耦合在一起，并且每当相邻行选择线未被选择时，该晶体管被使能，使得两条行选择线耦合到预定电压 水平。