METHOD AND DEVICE FOR TRANSFERRING DATA THROUGH PROCESSOR INTERFACE BUS

    公开(公告)号:JP2000115208A

    公开(公告)日:2000-04-21

    申请号:JP19008499

    申请日:1999-07-05

    Applicant: MOTOROLA INC

    Abstract: PROBLEM TO BE SOLVED: To enhance efficiency and cost effectiveness by indicating storage or refusal of data in a main memory and transferring the data between a slave device and a processor interface bus. SOLUTION: When requested data is changed by a local bus slave device, transaction is requested by asserting a first signal by the local bus slave device. In addition, a second signal is also asserted and write of changed data value in the main memory 36 is forced by the local bus slave device. And in this case, the data to be transferred by using the processor interface bus 34 is indicated whether it is stored in the main memory 36 or not by a main memory controller to be communicated with the processor interface bus 34. next, the data are transferred between the slave device 20 and the processor interface bus 34.

    METHOD AND DEVICE FOR EXECUTING DATA TRANSACTION IN DATA PROCESSING SYSTEM

    公开(公告)号:JP2000285068A

    公开(公告)日:2000-10-13

    申请号:JP21693099

    申请日:1999-07-30

    Applicant: MOTOROLA INC

    Abstract: PROBLEM TO BE SOLVED: To provide a method for identifying an address and data without requiring tag information. SOLUTION: Each of devices 10, 20, 30 connected to a division bus has a time reference queue for a transaction in reserving. The queue is updated in each execution of the transaction. An arbiter 40 has the copies of the queues in each of the devices 10, 20, 30 and a priority transaction is determined from all the queues in the arbiter 40. In a data storing period, a data transaction index is provided to all devices 10, 20, 30 so as to indicate the position of a succeeding transaction in the queues. The index attains irregular data transfer without requiring an address tag in the address storing period. Each queue maintains the history of transactions in reserving. Each device can supply a single index to both of source and sink devices by receiving individual data bus providing signals.

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