Squelchable direct coupled transistor audio amplifier constructed in integrated circuit
    1.
    发明授权
    Squelchable direct coupled transistor audio amplifier constructed in integrated circuit 失效
    在集成电路中构建的可直接耦合的直接耦合的晶体管音频放大器

    公开(公告)号:US3622900A

    公开(公告)日:1971-11-23

    申请号:US3622900D

    申请日:1969-09-29

    Applicant: MOTOROLA INC

    CPC classification number: H03F3/187 H03F1/26 H03G3/344

    Abstract: Direct coupled transistorized operational amplifier including differential amplifier input circuit, Darlington connected transistor driver, and high-efficiency output stage. To turn the amplifier on and off, bias potentials are applied to the differential amplifier in a manner to prevent audio transients. A control circuit controls the charging of capacitors to provide the bias potentials. The amplifier is constructed in integrated circuit form with compensation for temperature and frequency characteristics of substrate PNP and ring collector lateral PNPtransistors, and for input to output phase shift through the amplifier.

    Encoder-decoder device for selective signalling

    公开(公告)号:US3617888A

    公开(公告)日:1971-11-02

    申请号:US3617888D

    申请日:1969-08-07

    Applicant: MOTOROLA INC

    CPC classification number: H04W88/027 Y02D70/00

    Abstract: A tone signal encoder-decoder circuit uses an amplifier and a single tuned circuit for decoding and encoding a tone signal. A switching network enables a feedback circuit to cause operation of the circuit as an encoder and disables the feedback circuit to cause operation as a decoder. The DC operating levels for the circuit are increased and the source of operating potential for the frequency-responsive unit of the circuit operates through a higher impedance in the encoder mode. A provision also is made for facilitating rapid start for the encoding oscillator unit. Switching from the decoder to the encoder mode also disables the decoder mode preamplifier circuit and changes the biasing level of the detector to increase the threshold thereof when the circuit is in the encode mode of operation. A final provision is made for causing the radio receiver with which the circuit is employed to have the audio portion thereof selectively controlled by the output of the detector in the encoder-decoder circuit or the output of the normal receiver squelch circuit or a combination of the outputs of the squelch circuit and the detector at the option of the operator of the receiver.

    AUTOMATIC GAIN CONTROL MEANS FOR A SINGLE SIDEBAND RADIO RECEIVER

    公开(公告)号:CA1060955A

    公开(公告)日:1979-08-21

    申请号:CA258955

    申请日:1976-08-12

    Applicant: MOTOROLA INC

    Inventor: SKUTTA FRANK R

    Abstract: AUTOMATIC GAIN CONTROL MEANS FOR A SINGLE SIDEBAND RADIO RECEIVER An audio derived AGC signal for controlling RF and/or IF amplifiers in the radio receiver wherein a first control signal is developed by a circuit having a relatively slow response time when the audio output signal is below a predetermined value and a second control signal is developed by a circuit having a relatively fast response time when the audio output signal is at or above the predetermined value. The control signals are developed across a storage capacitor and a circuit is connected thereto for quickly discharging the capacitor when no signal is being supplied from the audio circuit.

    5.
    发明专利
    未知

    公开(公告)号:FI910266A0

    公开(公告)日:1991-01-18

    申请号:FI910266

    申请日:1991-01-18

    Applicant: MOTOROLA INC

    Abstract: A method and process for reducing the frequency lock-on time required for a radiotelephone transitioning from a standby mode to a normal operation mode. The present invention comprises a microphone (101) coupled to a transmit synthesizer (104) through audio circuitry (102), a reference oscillator (103), and a transistor switch (109) controlled by a processing device (110). The transmit synthesizer (104) is comprised of a phase detector (105) coupled to a loop filter (106) that is coupled to a voltage controlled oscillator (VCO) (107). The output of the VCO (107), which is also the output of the present invention, is fed back through a divide by N (108) to the phase detector. The microcomputer (110), in the standby mode, periodically switches on power to the transmit synthesizer (104), keeping a capacitor in the loop filter (106) charged and thereby maintaining the voltage applied to the VCO (107). This voltage determines the frequency of the signal produced by the VCO (107). If this voltage is kept at the level used during normal operation, when the radiotelephone goes from standby to normal, this voltage will be close to the proper level.

    METHOD FOR AUTOMATICALLY MATCHING A RADIO FREQUENCY TRANSMITTER TO AN ANTENNA

    公开(公告)号:CA1110707A

    公开(公告)日:1981-10-13

    申请号:CA326326

    申请日:1979-04-25

    Applicant: MOTOROLA INC

    Abstract: METHOD FOR AUTOMATICALLY MATCHING A RADIO FREQUENCY TRANSMITTER TO AN ANTENNA A plurality of series inductors and shunt capacitors are provided between a radio transmitter and an antenna. The inductors and capacitors are arranged in binary increments and are inserted in, or withdrawn from the circuit via provided reed relays. A microprocessor activates the relays in one of several modes until the required degree of match is provided. The status of the relays is stored in provided memory such that upon tuning of the transmitter to the same channel a proper match condition can be established without resort to the matching program.

    8.
    发明专利
    未知

    公开(公告)号:NO910106L

    公开(公告)日:1991-07-22

    申请号:NO910106

    申请日:1991-01-10

    Applicant: MOTOROLA INC

    Abstract: A method and process for reducing the frequency lock-on time required for a radiotelephone transitioning from a standby mode to a normal operation mode. The present invention comprises a microphone (101) coupled to a transmit synthesizer (104) through audio circuitry (102), a reference oscillator (103), and a transistor switch (109) controlled by a processing device (110). The transmit synthesizer (104) is comprised of a phase detector (105) coupled to a loop filter (106) that is coupled to a voltage controlled oscillator (VCO) (107). The output of the VCO (107), which is also the output of the present invention, is fed back through a divide by N (108) to the phase detector. The microcomputer (110), in the standby mode, periodically switches on power to the transmit synthesizer (104), keeping a capacitor in the loop filter (106) charged and thereby maintaining the voltage applied to the VCO (107). This voltage determines the frequency of the signal produced by the VCO (107). If this voltage is kept at the level used during normal operation, when the radiotelephone goes from standby to normal, this voltage will be close to the proper level.

    9.
    发明专利
    未知

    公开(公告)号:FI910266A

    公开(公告)日:1991-07-20

    申请号:FI910266

    申请日:1991-01-18

    Applicant: MOTOROLA INC

    Abstract: A method and process for reducing the frequency lock-on time required for a radiotelephone transitioning from a standby mode to a normal operation mode. The present invention comprises a microphone (101) coupled to a transmit synthesizer (104) through audio circuitry (102), a reference oscillator (103), and a transistor switch (109) controlled by a processing device (110). The transmit synthesizer (104) is comprised of a phase detector (105) coupled to a loop filter (106) that is coupled to a voltage controlled oscillator (VCO) (107). The output of the VCO (107), which is also the output of the present invention, is fed back through a divide by N (108) to the phase detector. The microcomputer (110), in the standby mode, periodically switches on power to the transmit synthesizer (104), keeping a capacitor in the loop filter (106) charged and thereby maintaining the voltage applied to the VCO (107). This voltage determines the frequency of the signal produced by the VCO (107). If this voltage is kept at the level used during normal operation, when the radiotelephone goes from standby to normal, this voltage will be close to the proper level.

    CAPACITOR PRECHARGE FOR REDUCED SYNTHESIZER LOCK TIME

    公开(公告)号:CA2033747A1

    公开(公告)日:1991-07-20

    申请号:CA2033747

    申请日:1991-01-11

    Applicant: MOTOROLA INC

    Abstract: CAPACITOR PRECHARGE FOR REDUCED SYNTHESIZER LOCK TIME of the Invention A method and process for reducing the frequency lockon time required for a radiotelephone transitioning from a standby mode to a normal operation mode. The present invention comprises a microphone (101) coupled to a transmit synthesizer (104) through audio circuitry (102), a reference oscillator (103), and a transistor switch (109) controlled by a processing device (110). The transmit synthesizer (104) is comprised of a phase detector (105) coupled to a loop filter (106) that is coupled to a voltage controlled oscillator (VCO) (107). The output of the VCO (107), which is also the output of the present invention, is fed back through a divide by N (108) to the phase detector. The microcomputer (110), in the standby mode, periodically switches on power to the transmit synthesizer (104), keeping a capacitor in the loop filter (106) charged and thereby maintaining the voltage applied to the VCO (107). This voltage determines the frequency of the signal produced by the VCO (107). If this voltage is kept at the level used during normal operation, when the radiotelephone goes from standby to normal, this voltage will be close to the proper level.

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