公开(公告)号：WO1981002819A1

公开(公告)日：1981-10-01

申请号：PCT/US1981000204

申请日：1981-02-18

Applicant: MOTOROLA INC

Inventor： MOTOROLA INC ,  JASON B ,  HALL S ,  VALLEY R

IPC: H03F03/04

CPC classification number: H03H11/0416 ,  H03H11/405

Abstract: An analog integrated filter circuit includes a capacitance multiplier (61) combined with a DC bias controlled current circuit (67) designed to render the filter circuit insensitive to changes in the parameter values of the components caused by process variations or a temperature change therein. The capacitance multiplier circuit (61) includes grounded or ungrounded capacitance multipliers in different combinations operatively coupled to the DC bias controlled current circuit (67) so that the capacitance multiplier circuit can be used to construct a predictable low pass, bandpass or high pass filter circuit with frequency characteristics that do not vary over temperature.