MANUFACTURING SEMICONDUCTOR ELEMENT, USING LATERAL GETTERING

    公开(公告)号:JPH10135226A

    公开(公告)日:1998-05-22

    申请号:JP29356297

    申请日:1997-10-08

    Applicant: MOTOROLA INC

    Abstract: PROBLEM TO BE SOLVED: To provide a method of effectively removing impurities from a semiconductor substrate forming semiconductor elements. SOLUTION: A semiconductor substrate 20 includes an Si layer 16 formed on an oxide layer 14. Gettering sinks 31, 32 are formed in the Si layer 16. Lateral gettering is applied to remove impurities from a first portion 26 of the semiconductor layer 16. An insulated gate semiconductor element 40 is formed on the semiconductor layer 15, with its channel region 55 formed in the first portion 26 of the layer 16. A gate dielectric layer 42 of the electrode 40 is formed on a part of the first portion 26 to enhance the bonding strength of the dielectric layer 42.

    Low profile integrated module interconnects

    公开(公告)号:AU2881702A

    公开(公告)日:2002-05-27

    申请号:AU2881702

    申请日:2001-11-07

    Applicant: MOTOROLA INC

    Abstract: A low profile integrated module is fabricated to include sheets of material, such as ceramic or PCB, fixed together and including a via extending through at least one of the plurality of sheets from the lower module surface partially to the upper module surface and in a side module surface. The via is filled with conductive material. The module is then mounted on a supporting substrate having a solder pad on the mounting surface with an area greater than the lower surface of the via. The lower surface of the via is positioned adjacent the upper surface of the mounting pad and soldered so that solder wicks up the via along the side module surface.

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