公开(公告)号：WO2003090477A1

公开(公告)日：2003-10-30

申请号：PCT/US2003/008025

申请日：2003-03-17

Applicant: MOTOROLA, INC.

Inventor： DYAS, Robert ,  CASTRO, Francisco ,  HARTON, Austin ,  HEROLD, Barry

IPC: H04N9/73

CPC classification number: H04N5/37455 ,  H04N5/3537 ,  H04N9/045 ,  H04N9/735

Abstract: A pixel image sensor (100) having an array of pixel elements (102), each pixel element being responsive to light of a particular color. Each pixel element (102) is independently supplied with a reference voltage signal (126) corresponding to the color of light to which the pixel element is responsive.

Abstract translation: 一种具有像素元件（102）阵列的像素图像传感器（100），每个像素元件响应特定颜色的光。 每个像素元件（102）独立地被提供有对应于像素元件响应的光的颜色的参考电压信号（126）。

公开(公告)号：WO2003051036A1

公开(公告)日：2003-06-19

申请号：PCT/US2002/037567

申请日：2002-11-22

Applicant: MOTOROLA, INC., A CORPORATION OF THE STATE OF DELAWARE

Inventor： HARTON, Austin ,  CASTRO, Francisco ,  HEROLD, Barry

IPC: H04N3/14

CPC classification number: H04N5/37455

Abstract: A time-integrating pixel sensor (100) having a photo-detector (102), a capacitor (104), a comparator (110) and a pixel data buffer (114). In operation, the photo-current from the photo-detector charges the capacitor and produces a photo-voltage. The photo-voltage sensed by the capacitor and a reference voltage (108) is compared with the comparator. If the photo-voltage exceeds the reference voltage, a global code value is latched into the pixel data buffer. The optical power falling on the photo-detector is determined from the latched code value. An array of sensors is incorporated into a semiconductor device together with circuitry (116) to read and decode the pixel data buffers. The reference voltage may be varied in time to increase the dynamic range of the sensor.

Abstract translation: 具有光检测器（102），电容器（104），比较器（110）和像素数据缓冲器（114）的时间积分像素传感器（100）。 在操作中，来自光电检测器的光电流对电容器充电并产生光电压。 将由电容器感测的光电压和参考电压（108）与比较器进行比较。 如果光电压超过参考电压，则将全局代码值锁存到像素数据缓冲器中。 根据锁存的代码值确定落在光电检测器上的光功率。 传感器阵列与电路（116）一起并入半导体器件中以读取和解码像素数据缓冲器。 参考电压可以在时间上变化以增加传感器的动态范围。

公开(公告)号：WO1997044893A1

公开(公告)日：1997-11-27

申请号：PCT/US1997007797

申请日：1997-05-07

Applicant: MOTOROLA INC.

Inventor： MOTOROLA INC. ,  BARRETT, Raymond, Louis, Jr. ,  HEROLD, Barry ,  PAJUNEN, Grazyna, Anna

IPC: H03D03/24

CPC classification number: H03L7/183 ,  H03L7/089 ,  H03L7/093

Abstract: A phase lock loop of a synthesizer (143) is controlled by applying (506) modern optimal control techniques for a predetermined period in a computing engine (222), in response to an error being introduced into a signal of the phase lock loop, and by utilizing (510) classical control techniques for controlling the phase lock loop after the predetermined period.

Abstract translation: 响应于引入到锁相环的信号中的误差，在计算引擎（222）中应用（506）现有的最优控制技术来控制合成器（143）的锁相环，并且 通过利用（510）经典控制技术来控制预定周期之后的锁相环。