公开(公告)号：WO1997032432A1

公开(公告)日：1997-09-04

申请号：PCT/US1996014043

申请日：1996-08-30

Applicant: MOTOROLA INC.

Inventor： MOTOROLA INC. ,  SRIDHAR, Manickam, R. ,  HOANG, Minh ,  WORTMAN, John, Jr. ,  LIS, Timothy, Allan

IPC: H04M11/00

CPC classification number: G06F13/128

Abstract: An apparatus (101) and method for interfacing between a processor (103) and a communications channel (105), the processor operable in data terminal equipment (102) such as a computer having a communications application program, to provide for data transmission and reception over a communications channel (105), utilizing the computer processor without additional or redundant microprocessor or digital signal processor components. The apparatus and method provide for data transfer between the interface apparatus (101) and the communications channel (105) at a first, determinate frequency corresponding to a specific data transmission rate. The apparatus and method provide for data transfer between the interface apparatus (101) and the processor (103) at a second, indeterminate frequency, and provides for interim data storage in memory (115) between data transmission (or data reception) and data processing, such as modulation and demodulation, by the computer processor (103). The apparatus and method further provide for generating an interrupt signal to the processor to indicate the presence of received data for processing and the absence of digital data for transmission.

Abstract translation: 一种用于在处理器（103）和通信信道（105）之间进行接口的装置（101）和方法，所述处理器可在诸如具有通信应用程序的计算机的数据终端设备（102）中操作，以提供数据发送和接收 通过通信信道（105），利用计算机处理器而不需要附加的或冗余的微处理器或数字信号处理器组件。 该装置和方法以对应于特定数据传输速率的第一确定频率提供接口装置（101）和通信信道（105）之间的数据传输。 该装置和方法提供在接口装置（101）和处理器（103）之间以不确定的第二频率进行数据传输，并且在数据传输（或数据接收）和数据处理之间提供在存储器（115）中的临时数据存储 ，如计算机处理器（103）的调制和解调。 该装置和方法进一步提供用于向处理器生成中断信号以指示接收的数据的存在以及用于传输的数字数据的不存在。

公开(公告)号：EP0885517A1

公开(公告)日：1998-12-23

申请号：EP96930657.0

申请日：1996-08-30

Applicant: MOTOROLA, INC.

Inventor： SRIDHAR, Manickam, R. ,  HOANG, Minh ,  WORTMAN, John, Jr. ,  LIS, Timothy, Allan

IPC: G06F13

CPC classification number: G06F13/128

Abstract: An apparatus (101) and method for interfacing between a processor (103) and a communications channel (105), the processor operable in data terminal equipment (102) such as a computer having a communications application program, to provide for data transmission and reception over a communications channel (105), utilizing the computer processor without additional or redundant microprocessor or digital signal processor components. The apparatus and method provide for data transfer between the interface apparatus (101) and the communications channel (105) at a first, determinate frequency corresponding to a specific data transmission rate. The apparatus and method provide for data transfer between the interface apparatus (101) and the processor (103) at a second, indeterminate frequency, and provides for interim data storage in memory (115) between data transmission (or data reception) and data processing, such as modulation and demodulation, by the computer processor (103). The apparatus and method further provide for generating an interrupt signal to the processor to indicate the presence of received data for processing and the absence of digital data for transmission.