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公开(公告)号：US20180323704A1
公开(公告)日：2018-11-08
申请号：US16019372
申请日：2018-06-26
Applicant: Micron Technology, Inc.
Inventor： Feng Pan , Michele Piccardi
Abstract: Certain embodiments of the present invention include an apparatus comprising a charge pump, configured to provide an output voltage at an output node of the charge pump, and a charge pump regulator circuit coupled to the charge pump. One such charge pump regulator circuit is configured to control the charge pump to increase the output voltage during a first period of time. Such a charge pump regulator circuit can also cause a node of a circuit coupled to the output node of the charge pump to reach a target voltage level during a second time period.
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公开(公告)号：US09780654B2
公开(公告)日：2017-10-03
申请号：US14657545
申请日：2015-03-13
Applicant: MICRON TECHNOLOGY, INC.
Inventor： Feng Pan
CPC classification number: H02M3/158 , G11C5/147 , G11C16/30 , H02M2001/0045
Abstract: A device includes a digital switch regulator to supply an output voltage and a first current to a load based on a reference voltage. The device also includes an analog circuit to supply a second current to the load in addition to the first current based on a duty cycle of the digital switch regulator.
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公开(公告)号：US09460792B2
公开(公告)日：2016-10-04
申请号：US14518807
申请日：2014-10-20
Applicant: MICRON TECHNOLOGY, INC.
Inventor： Feng Pan , Jaekwan Park , Ramin Ghodsi
CPC classification number: G11C16/0483 , G11C8/12 , G11C11/5628 , G11C11/5642 , G11C16/04 , G11C16/08 , G11C16/10 , G11C16/24 , G11C16/26
Abstract: Apparatuses and methods for segmented SGS lines are described. An example apparatus may include first and second pluralities of memory subblocks of a memory block. The apparatus may include a first select gate control line associated with the first plurality of memory subblocks and a second select gate control line associated with the second plurality of memory subblocks. The first select gate control line may be coupled to a first plurality of select gate switches of the first plurality of memory subblocks. The second select gate control line may be coupled to a second plurality of select gate switches of the second plurality of memory subblocks. The first and second pluralities of select gate switches may be coupled to a source. The apparatus may include a plurality of memory access lines associated with each the first and second pluralities of memory subblocks.
Abstract translation: 描述了分段SGS线的装置和方法。 示例性装置可以包括存储器块的第一和第二多个存储器子块。 该装置可以包括与第一多个存储器子块相关联的第一选择栅极控制线和与第二多个存储器子块相关联的第二选择栅极控制线。 第一选择栅极控制线可以耦合到第一多个存储器子块的第一多个选择栅极开关。 第二选择栅极控制线可以耦合到第二多个存储器子块的第二多个选择栅极开关。 第一和第二多个选择栅极开关可以耦合到源极。 该装置可以包括与每个第一和第二多个存储器子块相关联的多个存储器访问线。
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公开(公告)号：US20160268897A1
公开(公告)日：2016-09-15
申请号：US14657545
申请日：2015-03-13
Applicant: MICRON TECHNOLOGY, INC.
Inventor： Feng Pan
IPC: H02M3/158
CPC classification number: H02M3/158 , G11C5/147 , G11C16/30 , H02M2001/0045
Abstract: A device includes a digital switch regulator to supply an output voltage and a first current to a load based on a reference voltage. The device also includes an analog circuit to supply a second current to the load in addition to the first current based on a duty cycle of the digital switch regulator.
Abstract translation: 一种设备包括数字开关调节器，用于基于参考电压向负载提供输出电压和第一电流。 该装置还包括一个模拟电路，用于基于数字开关调节器的占空比，除了第一电流之外还向负载提供第二电流。
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公开(公告)号：US10854301B2
公开(公告)日：2020-12-01
申请号：US16182355
申请日：2018-11-06
Applicant: MICRON TECHNOLOGY, INC.
Inventor： Feng Pan , Ramin Ghodsi , Qiang Tang
Abstract: Apparatuses and methods for reducing read disturb are described herein. An example apparatus may include a first memory subblock including a first select gate drain (SGD) switch and a first select gate source (SGS) switch, a second memory subblock including a second SGD switch and a second SGS switch, and an access line associated with the first and second memory subblocks. The apparatus may include a control unit configured to enable the first and second SGD switches and the first and second SGS switches during a first portion of a read operation and to provide a first voltage on the access line during the first portion. The control unit may be configured to disable the first SGD switch and the first SGS switches during a second portion of the read operation and to provide a second voltage on the access line during the second portion.
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Patent Agency Ranking
公开(公告)号：US10134478B2
公开(公告)日：2018-11-20
申请号：US15436289
申请日：2017-02-17
Applicant: Micron Technology, Inc.
Inventor： Feng Pan , Ramin Ghodsi , Qiang Tang
Abstract: Apparatuses and methods for reducing read disturb are described herein. An example apparatus may include a first memory subblock including a first select gate drain (SGD) switch and a first select gate source (SGS) switch, a second memory subblock including a second SGD switch and a second SGS switch, and an access line associated with the first and second memory subblocks. The apparatus may include a control unit configured to enable the first and second SGD switches and the first and second SGS switches during a first portion of a read operation and to provide a first voltage on the access line during the first portion. The control unit may be configured to disable the first SGD switch and the first SGS switches during a second portion of the read operation and to provide a second voltage on the access line during the second portion.
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公开(公告)号：US10033268B2
公开(公告)日：2018-07-24
申请号：US14796743
申请日：2015-07-10
Applicant: Micron Technology, Inc.
Inventor： Feng Pan , Michele Piccardi
Abstract: Certain embodiments of the present invention include an apparatus comprising a charge pump, configured to provide an output voltage at an output node of the charge pump, and a charge pump regulator circuit coupled to the charge pump. One such charge pump regulator circuit is configured to control the charge pump to increase the output voltage during a first period of time. Such a charge pump regulator circuit can also cause a node of a circuit coupled to the output node of the charge pump to reach a target voltage level during a second time period.
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公开(公告)号：US20180048234A1
公开(公告)日：2018-02-15
申请号：US15721985
申请日：2017-10-02
Applicant: MICRON TECHNOLOGY, INC.
Inventor： Feng Pan
CPC classification number: H02M3/158 , G11C5/147 , G11C16/30 , H02M2001/0045
Abstract: A device includes a digital switch regulator to supply an output voltage and a first current to a load based on a reference voltage. The device also includes an analog circuit to supply a second current to the load in addition to the first current based on a duty cycle of the digital switch regulator.
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公开(公告)号：US09640271B2
公开(公告)日：2017-05-02
申请号：US14564821
申请日：2014-12-09
Applicant: MICRON TECHNOLOGY, INC.
Inventor： Feng Pan , Xiaojiang Guo
Abstract: A low-dropout regulator includes an error amplifier to provide a control signal, a first transistor, and a second transistor. The first transistor receives the control signal and has a source-drain path electrically coupled between a supply voltage node and a load, the first transistor to power the load in response to a voltage on the supply voltage node rising above an absolute value of a threshold voltage of the first transistor. The second transistor has a source-drain path electrically coupled between the supply voltage node and the load, the second transistor to receive the control signal in response to the voltage on the supply voltage node rising above a particular voltage.
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公开(公告)号：US09607692B2
公开(公告)日：2017-03-28
申请号：US14868604
申请日：2015-09-29
Applicant: Micron Technology, Inc.
Inventor： Qiang Tang , Feng Pan , Ramin Ghodsi , Mark A. Helm
CPC classification number: G11C11/5642 , G11C7/14 , G11C29/021 , G11C29/028 , G11C2029/0409
Abstract: Apparatuses and methods for threshold voltage (Vt) distribution determination are described. A number of apparatuses can include sense circuitry configured to determine a first current on a source line of an array of memory cells, the first current corresponding to a first quantity of memory cells of a group of memory cells that conducts in response to a first sensing voltage applied to an access line and determine a second current on the source line, the second current corresponding to a second quantity of memory cells of the group that conducts in response to a second sensing voltage applied to the access line. The number of apparatuses can include a controller configured to determine at least a portion of a Vt distribution corresponding to the group of memory cells based, at least in part, on the first current and the second current.
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