公开(公告)号：US06735671B1

公开(公告)日：2004-05-11

申请号：US09612266

申请日：2000-07-07

Applicant: Minoru Kida

Inventor： Minoru Kida

IPC: G06F126

CPC classification number: G06F1/263 ,  G06F1/266 ,  G06F3/0607 ,  G06F3/0634 ,  G06F3/0635 ,  G06F3/0676

Abstract: A system for accessing a hard disk drive built in computer includes a hard disk drive, a power supply, a controller, a power switching circuit and a signal controller. The hard disk drive stores data. The power supply supplies a power to the hard disk drive. The controller controls the hard disk drive by a internal control signal. The power switching circuit supplies one of the power and an external power which is supplied from an external computer. The signal controller selectively applies one of the internal control signal and an external control signal which is applied by the external computer.

Abstract translation: 用于访问内置计算机的硬盘驱动器的系统包括硬盘驱动器，电源，控制器，电源开关电路和信号控制器。 硬盘驱动器存储数据。 电源为硬盘驱动器提供电源。 控制器通过内部控制信号控制硬盘驱动器。 电源开关电路提供从外部计算机提供的电源和外部电源之一。 信号控制器选择性地施加由外部计算机施加的内部控制信号和外部控制信号中的一个。

公开(公告)号：US20090187793A1

公开(公告)日：2009-07-23

申请号：US12357080

申请日：2009-01-21

Applicant: Hiroshi Dohji ,  Hironori Makimura ,  Minoru Kida ,  Nobuyoshi Tanaka

Inventor： Hiroshi Dohji ,  Hironori Makimura ,  Minoru Kida ,  Nobuyoshi Tanaka

IPC: G06F11/26 ,  G06F13/28

CPC classification number: G11C29/56 ,  G11C2029/0401 ,  G11C2029/2602

Abstract: To provide a method and the like for testing a main memory in a multi processor system, which is capable of reducing a test execution time and accordingly a start-up time as compared with the case where a single processor is used for the test. The present invention provides a method for testing a main memory (MM) in a multi processor system (MPS) including a main processor (MP) and multiple sub processors (SP) each having a DMA transfer mechanism and a local store (LS). The method and the like including: MP allocating a partial memory region (PMA) in MM to each SP; MP requesting each SP to test the allocated PMA; each SP filling LS thereof with initial data in response to receiving the request; each SP transferring the data stored in LS thereof to PMA by using a DMA transfer; each SP transferring the data stored in PMA to LS thereof by a DMA transfer; and SP testing the data in LS; and MP judging a test result on MM by putting together the tests results in response to the completion of all the tests by respective SP.

Abstract translation: 提供一种用于测试多处理器系统中的主存储器的方法等，与单处理器用于测试的情况相比，其能够减少测试执行时间并相应地减少启动时间。 本发明提供了一种用于在包括主处理器（MP）和多个子处理器（SP）的多处理器系统（MPS）中测试主存储器（MM）的方法，每个子处理器具有DMA传输机制和本地存储器（LS）。 所述方法等包括：MP向每个SP分配MM中的部分存储区域（PMA）; MP要求每个SP测试分配的PMA; 每个SP响应于接收到请求而填充其初始数据; 每个SP通过使用DMA传输将其LS中存储的数据传送到PMA; 每个SP通过DMA传输将存储在PMA中的数据传送到LS; 并对LS中的数据进行SP测试; 并且MP通过将测试结果组合在一起来响应于相应SP的所有测试的完成来判断MM的测试结果。

公开(公告)号：US08181072B2

公开(公告)日：2012-05-15

申请号：US12357080

申请日：2009-01-21

Applicant: Hiroshi Dohji ,  Hironori Makimura ,  Minoru Kida ,  Nobuyoshi Tanaka

Inventor： Hiroshi Dohji ,  Hironori Makimura ,  Minoru Kida ,  Nobuyoshi Tanaka

IPC: G11C29/00

CPC classification number: G11C29/56 ,  G11C2029/0401 ,  G11C2029/2602

Abstract: To provide a method and the like for testing a main memory in a multi processor system, which is capable of reducing a test execution time and accordingly a start-up time as compared with the case where a single processor is used for the test. The present invention provides a method for testing a main memory (MM) in a multi processor system (MPS) including a main processor (MP) and multiple sub processors (SP) each having a DMA transfer mechanism and a local store (LS). The method and the like including: MP allocating a partial memory region (PMA) in MM to each SP; MP requesting each SP to test the allocated PMA; each SP filling LS thereof with initial data in response to receiving the request; each SP transferring the data stored in LS thereof to PMA by using a DMA transfer; each SP transferring the data stored in PMA to LS thereof by a DMA transfer; and SP testing the data in LS; and MP judging a test result on MM by putting together the tests results in response to the completion of all the tests by respective SP.

Abstract translation: 提供一种用于测试多处理器系统中的主存储器的方法等，与单处理器用于测试的情况相比，其能够减少测试执行时间并相应地减少启动时间。 本发明提供了一种用于在包括主处理器（MP）和多个子处理器（SP）的多处理器系统（MPS）中测试主存储器（MM）的方法，每个子处理器具有DMA传输机制和本地存储器（LS）。 所述方法等包括：MP向每个SP分配MM中的部分存储区域（PMA）; MP要求每个SP测试分配的PMA; 每个SP响应于接收到请求而填充其初始数据; 每个SP通过使用DMA传输将其LS中存储的数据传送到PMA; 每个SP通过DMA传输将存储在PMA中的数据传送到LS; 并对LS中的数据进行SP测试; 并且MP通过将测试结果组合在一起来响应于相应SP的所有测试的完成来判断MM的测试结果。

公开(公告)号：US06238728B1

公开(公告)日：2001-05-29

申请号：US09580421

申请日：2000-05-30

Applicant: Toshihiko Ishiguri ,  Minoru Kida ,  Kazuhiko Mori ,  Hisao Ito

Inventor： Toshihiko Ishiguri ,  Minoru Kida ,  Kazuhiko Mori ,  Hisao Ito

IPC: A23K116

CPC classification number: A23K20/142 ,  A23K10/12 ,  A23K20/147 ,  A23K40/00 ,  A23L33/175 ,  Y10S426/807

Abstract: An amino acid-enriched feed, industrially produced mixed feed or premix thereof which is obtainable by mixing (a) a feed raw material containing predominantly at least one feed component selected from the group consisting of corn gluten meal powder, corn gluten feed powder and an intermediate product thereof, said intermediate product being one obtained in a corn wet milling step with (b) an amino acid fermentation broth containing 3 to 80% by weight of an amino acid or its treated solution and thereafter drying the resultant mixture or by conducting drying during mixing of the raw materials (a) and (b). It has improved powder characteristics in flowability and homogeneity of the mixing components as compared with the case that crystalline amino acid is used as feed additive.

Abstract translation: 一种富含氨基酸的饲料，工业上生产的混合饲料或其预混合物，其可通过将（a）主要含有至少一种饲料成分的饲料原料混合而获得，所述饲料成分选自玉米面筋粉，玉米面筋饲料粉和 所述中间产物是在玉米湿法研磨步骤中得到的中间产物，（b）含有3-80重量％氨基酸或其处理溶液的氨基酸发酵液，然后干燥所得混合物或进行干燥 在原料（a）和（b）的混合过程中。 与使用结晶氨基酸作为饲料添加剂的情况相比，具有改善的混合成分的流动性和均匀性的粉末特性。

公开(公告)号：US06735499B2

公开(公告)日：2004-05-11

申请号：US10090664

申请日：2002-03-05

Applicant: Yasuyuki Ohki ,  Minoru Kida

Inventor： Yasuyuki Ohki ,  Minoru Kida

IPC: G05D2330

CPC classification number: G06F1/206

Abstract: According to the present invention, it is possible to reduce the fan noise taking the human sense into consideration. Specifically, it is possible to ergonomically mitigate the discomfort due to the short-term variation of the working rate of the CPU by increasing the rotational frequency gradually and by decreasing the rotational frequency with the temperature fall taking the human sense of noise into account. The present invention reduces noise produced by a cooling fan by controlling the fan rotation to a minimum rotational frequency in accordance with the specification and performance of the heat source. Additionally, an embodiment of the present invention controls a cooling fan to a minimum allowable rotational frequency within a rated temperature range of the object to be cooled, thereby controlling the internal temperature of a computer system in such a way to minimize noise generation.

Abstract translation: 根据本发明，考虑到人的意识可以减少风扇噪音。 具体地说，可以通过逐渐增加旋转频率并通过降低旋转频率来减轻由于CPU的工作速率的短期变化而引起的不舒适，同时考虑到噪声的感觉，随着温度下降。 本发明通过根据热源的规格和性能将风扇旋转控制在最小旋转频率来减少由冷却风扇产生的噪声。 此外，本发明的一个实施例将冷却风扇控制在待冷却物体的额定温度范围内的最小允许旋转频率，从而以使噪声产生最小化的方式控制计算机系统的内部温度。

公开(公告)号：US06381808B1

公开(公告)日：2002-05-07

申请号：US09594036

申请日：2000-06-15

Applicant: Minoru Kida

Inventor： Minoru Kida

IPC: E05C1764

CPC classification number: G06F1/1616 ,  E05D11/081 ,  E05Y2201/21 ,  E05Y2201/25 ,  E05Y2900/606 ,  G06F1/1681 ,  Y10T16/540345 ,  Y10T16/54038

Abstract: There is provided a hinge rotatably connecting a first body to a sacond body, including (a) a main body to be fixed onto the first body, the main bodyr including a hollow cylindrical portion horizontally extending, (b) a rotation shaft fixed at one end to the second body and rotatably connected at the other end to the main body, (c) an outer collar connected to the hollow cylindrical portion of the main body in a direction in which the hollow cylindrical portion extended extends and (d) a frictional collar filling space therewith between the rotation shaft and both the outer collar and the hollow cylindrical portion. For instance, the first body may be a keyboard, and the second body may be a display screen in a note-type computer. The hinge ensures smooth rotation between the first and second bodies, and further ensures a greater upper limit in the rotation number than that of a conventional hinge used in a note-type computer.

Abstract translation: 提供了一种将第一主体可旋转地连接到主体的铰链，包括：（a）固定在第一主体上的主体，主体包括水平延伸的中空圆柱形部分，（b）固定在一体上的旋转轴 端部到第二主体并且在另一端可旋转地连接到主体，（c）外圆环，其在中空圆柱形部分延伸的方向上延伸延伸的方向连接到主体的中空圆柱形部分，以及（d）摩擦 在旋转轴与外套环和中空圆柱形部分之间的轴环填充空间。 例如，第一主体可以是键盘，并且第二主体可以是笔记型计算机中的显示屏幕。 铰链确保在第一和第二主体之间的平滑旋转，并且进一步确保比用于笔记型计算机的常规铰链的旋转数量更大的上限。

公开(公告)号：US5157833A

公开(公告)日：1992-10-27

申请号：US859130

申请日：1992-03-27

Applicant: Takayuki Kohama ,  Minoru Kida

Inventor： Takayuki Kohama ,  Minoru Kida

IPC: G11B15/60 ,  G11B23/087

CPC classification number: G11B23/08778 ,  G11B15/60 ,  G11B23/08757 ,  Y10T29/49547 ,  Y10T29/4956 ,  Y10T29/49565 ,  Y10T29/49986

Abstract: A guide pin-manufacturing method includes the steps of plating a stepped cylindrical main portion (which is formed of brass or another non-magnetic material) with a hard, thick chromium plating layer by rotating the main portion in a plating liquid, forming a large number of minute grooves in the entire surface of the main body such that the grooves extend in the circumferential direction of the main body, and forcibly fitting two collars around the respective ends of the main portion. By execution of these steps, a guide pin to be arranged inside a data cartridge is manufactured. The guide pin arranged in the data cartridge guides the magnetic tape such that the magnetic tape travels in a stable manner.

Abstract translation: 引导销的制造方法包括以下步骤：通过使电镀液中的主要部分旋转来镀覆硬铬厚镀层的阶梯状圆柱形主体部分（由黄铜或其它非磁性材料形成），形成大的 在主体的整个表面上的微小凹槽的数量使得凹槽在主体的圆周方向上延伸，并且强制地将两个凸环安装在主要部分的相应端部周围。 通过执行这些步骤，制造布置在数据盒内的引导销。 布置在数据盒中的引导引导磁带，使得磁带以稳定的方式行进。