Abstract:
A pair of narrow channel IGFET devices (10A, 10B) having separate insulated gate electrode structures (19A, 19B) formed over narrow channel regions (28A, 28B) of a substrate (11) flanking a central enhancement region (27). Methods of forming the narrow channel regions using a single photolithography step and forming separate gate electrode structures overlying each using alternative processes, each generally involving two photolithography steps, are set forth.