公开(公告)号：WO1981001476A1

公开(公告)日：1981-05-28

申请号：PCT/US1980001492

申请日：1980-11-03

Applicant: NCR CORP

Inventor： NCR CORP ,  DULEY R

IPC: G06F03/14

CPC classification number: G09G3/14

Abstract: A circuit (10) for controlling a display (12) in which selected characters are displayed at selected positions therein. The circuit (10) includes a memory unit (16) having a plurality of addresses (Po-P3) thereto and a processor (14) for writing character data in the memory unit (16) at the addresses, with the addresses corresponding to predetermined positions in the display. The memory unit also has a plurality of outputs which are operatively coupled to the display (12) to enable the display to generate characters corresponding to the associated character data at selected positions in the display when the addresses are selected. The circuit (10) also includes a counter unit (38) which is specially wired for selecting the addresses for the characters to be displayed. The display is divided into a high bank and a low bank of character positions, and the counter unit alternately addresses character positions in the high bank and the low bank. A control circuit (50) enables either the processor (14) or the counter unit (38) to address the memory unit.

公开(公告)号：WO1980001345A1

公开(公告)日：1980-06-26

申请号：PCT/US1979001053

申请日：1979-12-05

Applicant: NCR CORP

Inventor： NCR CORP ,  DULEY R

IPC: H03K03/023

CPC classification number: H03K3/0231

Abstract: An interval timer circuit including a single comparator (12) having first (14) and second (16) inputs thereto and an output (18) therefrom. The circuit includes a series connected resistive and capacitive means (R1, R2, C1) having a control point (A) which is connected for varying the voltage of the second input (16) of the comparator. A first reference voltage is established by a first means (R3, R4) at the first input (14) of the comparator whereby its output (18) changes from a second state to a first state when an increasing voltage at the control point (A) exceeds the first reference voltage. A second means (R4, R5, CR2) establishes a second reference voltage at the first input (14) of the comparator in response to the first state at the output thereof. A third diode means (CR1) produces a decreasing voltage at the control point (A) in response to the first state and when the decreasing voltage at the control point (A) is less than the second reference voltage, the output (18) of the comparator (12) changes to its second state to repeat the process.