Abstract:
A method and apparatus for synchronizing a digital data demodulator to a received phase modulation carrier signal (42) in which the carrier signal is phase shifted during each modulation period of the carrier to represent one of four pairs of binary bits or dibits. A dibit clock (76) is adjusted to the phase of a reference dibit clock (66, RDCL) whose output is used to synchronize the demodulator in establishing the location of the modulation period of the incoming carrier. In order to overcome errors found in the decoding of the carrier signal, the adjustment of the dibit clock is suppressed when the dibits 00 and 10 are being decoded.