公开(公告)号：FR2759491B1

公开(公告)日：1999-06-25

申请号：FR9801480

申请日：1998-02-09

Applicant: NEC CORP

Inventor： TAKEMURA HISASHI

IPC: H01J1/304 ,  H01J9/02 ,  H01J1/30

Abstract: A field-emission cold cathode having emitters 9 formed on silicon substrate 1, and a gate electrode film 7 formed on insulation film 6 and having openings over the emitters, further includes trenches 3 formed in silicon substrate 1, a plurality of emitters formed on regions surrounded by trenches 3, and n-type regions 5 formed on the silicon substrate directly below the emitters. Breakdowns caused by field concentrations brought about by the spread of current directly below the emitters can thus be prevented, and thus the emitter pitch within regions surrounded by trenches can be determined at will. When high voltage is impressed due to a discharge, the resistance connected to the emitters prevents the flow of large currents to the emitters and the occurrence of short-circuit damage.

公开(公告)号：AU2003211950A1

公开(公告)日：2003-09-04

申请号：AU2003211950

申请日：2003-02-13

Applicant: NEC CORP

Inventor： LEE JONG WOOK ,  TAKEMURA HISASHI

IPC: H01L21/28 ,  H01L21/285 ,  H01L21/336 ,  H01L21/60 ,  H01L29/423 ,  H01L29/45 ,  H01L29/786 ,  H01L29/78 ,  H01L21/288 ,  H01L21/44 ,  H01L21/445 ,  H01L29/49

公开(公告)号：DE69130598T2

公开(公告)日：1999-07-08

申请号：DE69130598

申请日：1991-09-02

Applicant: NEC CORP

Inventor： TAKEMURA HISASHI

IPC: H01L21/203 ,  H01L21/331 ,  H01L29/732 ,  H01L29/08 ,  H01L29/36

公开(公告)号：DE69130598D1

公开(公告)日：1999-01-21

申请号：DE69130598

申请日：1991-09-02

Applicant: NEC CORP

Inventor： TAKEMURA HISASHI

IPC: H01L21/203 ,  H01L21/331 ,  H01L29/732 ,  H01L29/08 ,  H01L29/36

公开(公告)号：FR2750247A1

公开(公告)日：1997-12-26

申请号：FR9707719

申请日：1997-06-20

Applicant: NEC CORP

Inventor： TAKEMURA HISASHI ,  YOSHIKI MASAYUKI

IPC: H01J1/304 ,  H01J9/02 ,  H01J1/30 ,  H01J31/12

Abstract: The device has a silicon substrate (1) which is covered by a resistor layer (12) divided into a network (12a) of resistor sections. The layer sections are separated by a buried layer (15) formed in a trench (16). A number of conical emitters (18) are formed on the network of resistor sections, one emitter per section. An insulating layer (19) is deposited over the resistor layer. The insulating layer has holes through which the emitters can protrude. A gate layer (20) with openings (20a) for each emitter, covers the insulating layer.

公开(公告)号：FR2759491A1

公开(公告)日：1998-08-14

申请号：FR9801480

申请日：1998-02-09

Applicant: NEC CORP

Inventor： TAKEMURA HISASHI

IPC: H01J1/304 ,  H01J9/02 ,  H01J1/30

Abstract: In a field emission cold cathode having a grid electrode with openings above tapering emitters (9) formed on a conductive substrate (1), the emitters (9) are formed on n-type regions (5) which have lower resistivity than the substrate and which are surrounded by trenches (3) extending downwards from the substrate surface. Also claimed is production of the above cold cathode by (a) forming a first insulating film on an n-type silicon substrate (1); (b) forming a mask, having openings in a trench-forming region surrounding an emitter-forming region, on the insulating film and structuring the insulating film; (c) forming trenches (3) in the substrate using the insulating film as mask; (d) forming a buried insulating film which fills the trenches and then removing the buried film and the first insulating film until the substrate surface is exposed; (e) doping the exposed substrate with n-type impurity atoms of preset concentration, to a depth corresponding to an emitter dispersion current region, to form an n-type region (5) of higher conductivity than the substrate (1); (f) forming a second insulating film and a gate electrode film (7) on the n-type region (5) and forming openings in the emitter-forming region of these films; and (g) forming emitters (9) on the n-type region in the openings.

公开(公告)号：FR2752643A1

公开(公告)日：1998-02-27

申请号：FR9710580

申请日：1997-08-22

Applicant: NEC CORP

Inventor： TAKEMURA HISASHI

IPC: H01J29/04 ,  H01J1/304 ,  H01J31/12 ,  H01J1/30 ,  H01J1/48

Abstract: The cathode includes pointed emitters (7a) surrounded by an electrode (4b) deposited on an insulating layer (3). An n type diffusion layer (2) is connected to the emitter. A second electrode (4a) is connected to the n-type layer. The cathode components are obtained on a p-type silicon substrate (1) which is provided with a substrate electrode (8).

公开(公告)号：FR2744565A1

公开(公告)日：1997-08-08

申请号：FR9701360

申请日：1997-02-06

Applicant: NEC CORP

Inventor： TAKEMURA HISASHI

IPC: H01J1/304 ,  H01J9/02 ,  H01J1/30

Abstract: The manufacturing method involves selectively forming a nitride mask (2a) on the substrate (1b) followed by etching to give the first part (33) of the emitter. A second mask is then formed on the side walls of the first part and the substrate is further etched to produce the second part (34). The mask is removed and the substrate is oxidised to form an overlaying oxide layer (5). Metal is deposited on the oxide layer and a mask finally allows the emitter region to be etched away to the sharp underlying emitter (3) surrounded by residual oxide and metal layers.

公开(公告)号：JP2000100314A

公开(公告)日：2000-04-07

申请号：JP26695098

申请日：1998-09-21

Applicant: NEC CORP

Inventor： TAKEMURA HISASHI

IPC: H01J23/06 ,  H01J1/304 ,  H01J3/02 ,  H01J29/04 ,  H01J31/12

Abstract: PROBLEM TO BE SOLVED: To provide a field emission type cold cathode that can reduce in operation voltage by restraining degradation of breakdown strength between a gate electrode and an emitter and occurrence of discharge breakdown and by shortening distance between the gate electrode and the emitter. SOLUTION: This cold cathode is a board 1, that has an emitter 10a emitting electrons formed on the upper surface and is used as an emitter leading electrode, and a gate electrode 7 that is formed on the board 1 via insulating films 3, 6 and has an opening, through which the emitter 10a is surrounded spaced from it. A space for separating the gate electrode 7 from the emitter electrode 10a is near the emitter, a boundary 3a abutting to a space for an insulating film 3 and the board 1 is at a position lower than the surface of the board 1 on which the emitter 10a is formed, and a trench 4 is formed in the board 1 from a position that surrounds the emitter 10a, away from the emitter 10a farther than the boundary 3a.

公开(公告)号：JPH10154459A

公开(公告)日：1998-06-09

申请号：JP31216396

申请日：1996-11-22

Applicant: NEC CORP

Inventor： TAKEMURA HISASHI

IPC: H01J1/304 ,  H01J3/02 ,  H01J29/04 ,  H01J31/12 ,  H01J1/30

Abstract: PROBLEM TO BE SOLVED: To prevent the large-scale breakdown of a gate voltage due to an electric discharge from an anode electrode by forming planar corners in an obtuse internal angle or a circular arc on the upper face side of the gate electrode facing the anode electrode, and forming the boundary between the upper and lower planes and side face in the cross sectional shape into an obtuse angle or a circular arc. SOLUTION: Emitters 5a having sharp tips and a gate electrode 3a on an insulating film 2 for surrounding the emitters 5a are formed on the silicon substrate 1 of an emitter electrode, and an anode electrode 7 is provided above them. The cross section of the boundary section of the side face to the gate electrode 3a facing the anode electrode 7 is formed into a circular arc or an obtuse angle, and the discharge- suppressing effect is obtained with respect to the anode electrode 7 and the emitters 5a. The planar corners of the gate electrode 3a are formed into an obtuse angle or a circular arc, the electric field is hardly concentrated, and the electric discharge from the anode electrode 7 is suppressed. A dummy electrode electrically insulated and having an acute projection is preferably formed around the gate electrode 3a, and the gate electrode 3a is protected by its electric discharge.