公开(公告)号：JPH07191829A

公开(公告)日：1995-07-28

申请号：JP33117393

申请日：1993-12-27

Applicant: NEC CORP

Inventor： TAWARA SHUICHI ,  YOROZU SHINICHI

IPC: H01L39/22 ,  G06F7/48 ,  G11C11/44 ,  H03K3/38

Abstract: PURPOSE:To unnecessitate any timing sequence for operations and to reduce the number of I/O pins by inputting a signal, which is the product arithmetic result of an input signal and a latch enable signal, to an input line. CONSTITUTION:When a latch enable signal 2 is inputted to a signal input line 1, the signal is transmitted through a product arithmetic circuit 17 to a data holding loop, and data are written. When the calculated result is '1', the product arithmetic circuit 17 is switched, and a current is impressed to the data holding loop. As a result, a Josephson joint 3 is switched. Reading is performed when the gate current of a sense circuit 7 rises. When a circulating current flows to the data holding loop, the sense circuit 7 is switched with the rising of a sense gate current, and an output appears at a real signal output line 19. When no circulating current flows to the data holding loop, a Josephson joint 4 is switched on the final stage when the sense gate current rises, and an output appears at a spare signal output line 18.

公开(公告)号：JPH0250488A

公开(公告)日：1990-02-20

申请号：JP20161388

申请日：1988-08-11

Applicant: NEC CORP

Inventor： TAWARA SHUICHI

IPC: H01L39/06 ,  H01L21/3205 ,  H01L23/52 ,  H05K1/02 ,  H05K3/28 ,  H05K3/34

Abstract: PURPOSE:To stably maintain a superconducting state by covering the top of the whole wiring part, or the top and the sidewall with low resistance metal. CONSTITUTION:A superconducting wiring 1, a low resistance metal 3, a silicon substrate 5, and an insulating film 6 are provided. The wiring 1 is covered with the metal 3 in this manner to suppress the resistance of the part 2 which is normal conduction transited and to suppress Joule heat generated thereat to refrigerant cooling capacity or less. Accordingly, even if the part of the wiring 1 is transited to a normal conducting state, the wiring 1 can be reset to a superconducting state without disconnecting an applied current. Thus, the superconducting state can be stably maintained.

公开(公告)号：JPH01110787A

公开(公告)日：1989-04-27

申请号：JP26848787

申请日：1987-10-23

Applicant: NEC CORP

Inventor： KITAMURA MITSUHIRO ,  TAWARA SHUICHI

IPC: H01L39/02 ,  H01L33/08 ,  H01L33/10 ,  H01L33/14 ,  H01L33/30 ,  H01L33/38 ,  H01L33/40 ,  H01L33/44 ,  H01S5/00 ,  H01S5/026 ,  H01S5/042

Abstract: PURPOSE:To prevent a voltage drop due to a wiring so as to obtain a large scale integrated type semiconductor light emitting device provided with 10 or more light emitting elements, which is excellently uniform in a distribution of light emitting intensity by a method wherein a part of electrode wiring provided in the device, at least, is formed out of a superconductor material. CONSTITUTION:A integrated type semiconductor light emitting device is composed of a plurality of semiconductor light emitting elements 2 integrated on a substrate 1, where a part of electrode wirings provided in the device is, at least, formed of a superconductive material. For example, 100X100=10 of GaAs/GaAlAs planar type semiconductor lasers are integrated into a two- dimentional array and electrode wirings formed of YBa2Cu3O7-x superconductor material are provided to drive lasers independently of each other and connected with 2500 of Au electrode pads provided to each of four sides of the device. By these processes, even a large scale integrated device composed of 10 -10 or more of elements is made to eliminate the ununiformity of elements in property due to the wiring resistance, so that a large scale integrated device improved in uniformity can be realized.

公开(公告)号：JPH09172439A

公开(公告)日：1997-06-30

申请号：JP33161595

申请日：1995-12-20

Applicant: NEC CORP

Inventor： TAWARA SHUICHI ,  HATTORI WATARU

IPC: H01L39/22 ,  H04L12/28 ,  H04Q3/52

Abstract: PROBLEM TO BE SOLVED: To attain the buffer function of a large capacity by small constitution by using an superconductive delay line. SOLUTION: When a cell is inputted to a first input terminal 3, whether the main body of a cross bar switch 2 cross-operates or bar-operates are decided by a control signal inputted to a control signal terminal 7 at the same time of this. When an output destination is busy, the main body of the cross bar switch 2 is controlled to cross-operate by the control signal so that the cell is sent from a second output terminal 6 to a superconductive strip line 1 to be stored. The stored cell is propagated through the superconductive strip line 1 and delayed by a prescribed time to be inputted to the second input terminal 5 of the main body of the cross bar switch 2. The main body of the cross bar switch 2 is realized by a transistor using a compound semiconductor, e.g.

公开(公告)号：JPH08172226A

公开(公告)日：1996-07-02

申请号：JP31361194

申请日：1994-12-16

Applicant: NEC CORP

Inventor： TAWARA SHUICHI

IPC: H01L39/22 ,  H03K17/92

Abstract: PURPOSE: To provide a small-sized data exchange switch in which power conservation can be obtained by expediting data exchange between processors and the executing performance of a multiprocessor system can be extremely improved. CONSTITUTION: This data exchange switch is formed by providing a predetermined electric terminal by using a coupler for coupling Josephson lines and resistors. A first input signal input from a first input terminal 15 and a second input signal input from a second input terminal 16 become a first output signal and a second output signal by switching the lines for advancing by a first control signal input from input terminals 13, 14 for first control signals and second control signals input from input terminals 8, 11 for second control signals and switching a first output terminal 17 and a second output terminal 18, and hence a fundamental function as the data exchange switch is obtained.

公开(公告)号：JPH06268270A

公开(公告)日：1994-09-22

申请号：JP4939693

申请日：1993-03-10

Applicant: NEC CORP

Inventor： TAWARA SHUICHI

IPC: H01L39/22 ,  H03K19/195 ,  H03M7/22

Abstract: PURPOSE:To enable a NOR type superconducting decoder circuit to generate timing signals required for operating an inverter circuit at a minimal timing margin and furthermore is enhanced in decoding operate ion. CONSTITUTION:A decoder circuit is composed of magnetic coupling logic gate circuits of NOR logic, wherein six OR gate circuits 11 to 16 as many as the number of bits of the decoder circuit are provided to the terminal end of an input line A of the decoder circuit. True signals A to F of bit signal and complementary signals are inputted into the OR gate circuits 11 to 16 respectively, the output signals outputted from the six OR gate circuits 11 to 16 are inputted into a single AND gate circuit. The output signals of the AND gate circuit are inputted as timing signals 4 of an inverter circuit block 2 inside the decoder circuit.

公开(公告)号：JPH08180687A

公开(公告)日：1996-07-12

申请号：JP32080394

申请日：1994-12-22

Applicant: NEC CORP

Inventor： YOROZU SHINICHI ,  TAWARA SHUICHI

IPC: H01L39/22 ,  G11C11/44

Abstract: PURPOSE: To decrease a number of input signals to a circuitry, to reduce a number of I/O pins and to improve the efficiency of the circuit by writing magnetic flux into a data holding loop by directly inputting only a true signal. CONSTITUTION: When the calculated result in the operating region of a Josephson logic circuit is '1', an input 1 from a product arithmetic circuit is passed through a separator circuit 25, a current is made to flow through a magnetism holding loop composed of a Josephson junction 7 and an inductance, the Josephson junction 7 is made to be a superconducting state and a persistent current is made to flow through the loop. When the calculated result is '0', the product arithmetic circuit 24 is not switched over and the circuit is not operated. When the persistent current does not flow at the rising time of a gate current, since a Josephson junction 13 becomes a voltage state, the read signal is outputted to an auxiliary signal output line 23 by making a current flow through a Josephson junction 14. By sending the output of a true signal line 22 to an inductance 19, resetting is performed by means of a pulse. At this time, mal-function due to the pulse is prevented by the separator circuit 25.

公开(公告)号：JPH05243629A

公开(公告)日：1993-09-21

申请号：JP4160392

申请日：1992-02-27

Applicant: NEC CORP

Inventor： TAWARA SHUICHI

IPC: H01L39/22 ,  G11C11/44 ,  H03K19/195

Abstract: PURPOSE:To decrease reset time, and thus cycle time, of a superconducting memory. CONSTITUTION:The reverse current flowing through a bias line 7 at a rise time of a bias current is used to switch a reset gate circuit 4 inserted in series with a driver circuit 1 in the bias line. The reset gate circuit has an asymmetrical threshold characteristic curve and it is supplied with direct current. Therefore, the reset gate circuit is superconducting in biased condition, whereas it has high resistance (R') at the leading edge of bias current, that is, when the reverse current flows. This means that the time constant of operating current of the memory cell array loop is changed from L/R to L/(R+R'), where L is the inductance of the memory cell array loop. As a result, the rise time is decreased considerably.

公开(公告)号：JPH03291937A

公开(公告)日：1991-12-24

申请号：JP9341190

申请日：1990-04-09

Applicant: NEC CORP

Inventor： TAWARA SHUICHI

IPC: H01L21/3205 ,  H01L23/52 ,  H01L39/06

Abstract: PURPOSE:To increase the critical current density, and return the normal conduction part generated in a current-applied superconducting wiring to the superconducting state without cutting off the current, by dividing a wiring part constituted of superconducting material formed on a substrate into fine lines having a width narrower than the effective magnetic field permeation length. CONSTITUTION:In a superconducting wiring 1 constituted of superconducting material formed on a substrate 2, said wiring 1 is divided into thin lines having a width 3 narrower than the effective magnetic field permeation length of the superconducting material. For example, one wiring line is divided into thin lines whose width 3 is W satisfying the relation of W /t where lambda is the magnetic field permeation length of the superconductor and (t) is the film thickness 4 of the superconductor. Thereby the permeation of magnetic flux quantum into the superconductor can be prevented and the critical current density can be increased. Hence the resistance of a normal conduction transition part is restrained to be small, and the Joule's heat generated in said part can be restricted within the cooling capability of refrigerant, and therefore, when a part of the superconducting wiring is transferred in the normal conduction state, said part can be returned to the superconducting state without cutting out the applied current.

公开(公告)号：JP2000111588A

公开(公告)日：2000-04-21

申请号：JP28505398

申请日：1998-10-07

Applicant: NEC CORP

Inventor： HIDAKA MUTSUO ,  TAWARA SHUICHI

IPC: G01R19/00 ,  G01R33/035

Abstract: PROBLEM TO BE SOLVED: To provide a highly accurate current measuring means for measuring a current waveform with time accuracy of picosecond and current accuracy of microampere. SOLUTION: A current measuring circuit detects a magnetic field generated by the measuring current with a superconduction detection loop 12 as a current and measures the waveform accurately with a superconduction sampler circuit 11. In this case, measurement with higher accuracy becomes possible by placing the current measuring circuit and the measuring object 13 in the same vacuum space. As the results, the waveform of the current flowing in the wire 14 of the measuring object 13 can be accurately measured.