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公开(公告)号：FR2750533A1
公开(公告)日：1998-01-02
申请号：FR9708136
申请日：1997-06-27
Applicant: NEC CORP
Inventor： TOMIHARI YOSHINORI
Abstract: The cathode has an insulating oxide film (4) formed on a conducting silicon layer (1). The film is covered by a resistive layer (5) which is in contact (2,3) with the silicon layer around an annular ring and in a central circular disc at a perpendicular distance, L, from the external and internal edge of the cathode. The pattern may be changed so that there are two annular rings of contacts between the resistive layer and the silicon at a perpendicular distance, L, from a narrower annular ring of emitters and from a central circular cluster of emitters. The emitters lie on the resistive layer in cylindrical holes in a second insulating layer (6) on which lies the grid electrode (7).
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公开(公告)号：NL1007507C2
公开(公告)日：2002-01-03
申请号：NL1007507
申请日：1997-11-10
Applicant: NEC CORP
Inventor： SEKO NOBUYA , TOMIHARI YOSHINORI
Abstract: An image display device incorporating a quick-action electron source is disclosed. After the power source of the device is turned on, drive signals are outputted from an RGB output circuit to each of the RGB electron sources after it is detected that sufficient deflection current is flowing from horizontal/vertical deflection circuit to the deflection yoke to enable the electron beam to adequately scan the screen.
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公开(公告)号：FR2748847B1
公开(公告)日：2000-01-07
申请号：FR9705154
申请日：1997-04-25
Applicant: NEC CORP
Inventor： SEKO NOBUYA , TOMIHARI YOSHINORI
Abstract: There is provided a method of fabricating a field emission cold cathode, including the steps, in sequence, of (a) forming a first insulating layer on a substrate and further forming a first electrode layer on first insulating layer, (b) forming at least one opening in first electrode layer, (c) forming a second insulating layer on first electrode layer and further forming a second electrode layer on second insulating layer, (d) forming at least one opening in second electrode layer, (e) optionally repeating steps (c) and (d) predetermined number of times, (f) forming a cavity extending from an uppermost electrode layer to substrate, (g) forming a first sacrifice layer around a first opening of a first electrode layer, (h) forming a second sacrifice layer around a second opening of a second electrode layer, and (i) forming an emitter electrode on substrate with first sacrifice layer being used as a mask. The method enables a field emission cold cathode including a focusing electrode to have small misalignment between an opening of a first opening of a first electrode layer and an emitter electrode to the same degree as that of a field emission cold cathode including no focusing electrode.
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公开(公告)号：FR2748847A1
公开(公告)日：1997-11-21
申请号：FR9705154
申请日：1997-04-25
Applicant: NEC CORP
Inventor： SEKO NOBUYA , TOMIHARI YOSHINORI
Abstract: The fabrication method for the cathode involves using a silicon substrate (11) covered by an oxide layer (12), and a tungsten electrode (13). A photoresist mask is deposited over the tungsten layer, which is then processed by photolithography to generate several circular openings. A silicon dioxide layer (14) is deposited over the tungsten electrode after the mask has been removed. Concentrating tungsten electrodes (15) are formed over the silicon dioxide layer. Openings (22) which are aligned with the circular openings beneath, are obtained by photolithography.
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Patent Agency Ranking
公开(公告)号：FR2785718B1
公开(公告)日：2002-01-25
申请号：FR9913898
申请日：1999-11-05
Applicant: NEC CORP
Inventor： IMURA HIRONORI , SEKO NOBUYA , TOMIHARI YOSHINORI
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公开(公告)号：AU6268001A
公开(公告)日：2001-12-11
申请号：AU6268001
申请日：2001-05-31
Applicant: NEC CORP
Inventor： TOMIHARI YOSHINORI
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公开(公告)号：FR2785718A1
公开(公告)日：2000-05-12
申请号：FR9913898
申请日：1999-11-05
Applicant: NEC CORP
Inventor： IMURA HIRONORI , SEKO NOBUYA , TOMIHARI YOSHINORI
Abstract: The grid layer includes two different resistive materials. The cathode comprises a conductive substrate (9) with emitter cones (6) formed on this substrate. A grid electrode (2) is provided above the conductive substrate and an insulating layer (5) is interposed between the substrate and the grid electrode. The grid electrode and the insulating layer both have a series of apertures (1) which are aligned, so the emitter cones pass through these holes. the substrate is formed with channels (12) surrounding each group of emitter points, filled with insulator material. The grid electrode comprises first and second resistive layers (3,4), the first having a higher resistivity than the second.
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公开(公告)号：NL1007507A1
公开(公告)日：1998-05-14
申请号：NL1007507
申请日：1997-11-10
Applicant: NEC CORP
Inventor： SEKO NOBUYA , TOMIHARI YOSHINORI
Abstract: An image display device incorporating a quick-action electron source is disclosed. After the power source of the device is turned on, drive signals are outputted from an RGB output circuit to each of the RGB electron sources after it is detected that sufficient deflection current is flowing from horizontal/vertical deflection circuit to the deflection yoke to enable the electron beam to adequately scan the screen.
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公开(公告)号：JP2000243240A
公开(公告)日：2000-09-08
申请号：JP4234699
申请日：1999-02-19
Applicant: NEC CORP
Inventor： TOMIHARI YOSHINORI
Abstract: PROBLEM TO BE SOLVED: To suppress deformation of a part corresponding to an opening part of a gate electrode, when manufacturing a field emission type cathode equipped with a focusing electrode. SOLUTION: A first insulating layer 2, a gate electrode 3, a second insulating layer 4, a focusing electrode 5, a third insulating layer 6, and an etching mask 7 obtained by patterning an opening part are formed on a base 1. Although a third insulating layer 6 in the opening part region, the focusing electrode 5 and the second insulating layer 4 are removed by anisotropic etching, it is stopped with the second insulating layer 4 with it still remaining thin, the etching mask 7 is removed, and a fourth insulating layer 8 is formed. Although the gate electrode 3 and the first insulating layer 2 are removed by the anisotropic etching through etching back the bottom part of the opening part narrowed by the fourth insulating layer 8 until the gate electrode 3 is exposed, it is stopped with the first insulating layer 2 still remaining thin, the fourth insulating layer 8, the third insulating layer 6 and the bottom part of the opening part in the first insulating layer 2 are removed by wet etching, and an emitter 10 is formed on the base 1.
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