公开(公告)号：WO1997049060A1

公开(公告)日：1997-12-24

申请号：PCT/US1997010777

申请日：1997-06-20

Applicant: NORAND CORPORATION

Inventor： NORAND CORPORATION ,  DURBIN, Dennis, A. ,  RASMUSSEN, Jon

IPC: G06K07/10

CPC classification number: G06K7/1491 ,  G06K7/14

Abstract: A coded image capture and decoding system (10) includes an image capture (14) unit and a host unit (12) which operate to capture image data, generate a plurality of coded images, and, thereafter, to decode the plurality of coded images with a non-dedicated host processing circuitry. The system comprises an image capture unit (14) and a host unit (12) which may be installed together or separately in one or more physical devices. The image capture unit (14) includes an image processor, an image buffer, an optical unit, an image buffer and an interface module. The host unit (12) includes a host processor, conventional hardware and software functions, and an interface module. During a capture cycle, the image capture unit (14) repeatedly captures images from a coded target (16). When the capture cycle is complete, the image capture unit (14) attempts to interrupt the host unit (12). The host unit (12) responds to the interrupt when it is available, receives the plurality of coded images over a communication link, and performs decode processing of the coded images.

Abstract translation: 编码图像捕获和解码系统（10）包括图像捕获（14）单元和主机单元（12），其操作以捕获图像数据，生成多个编码图像，然后解码多个编码图像 具有非专用主机处理电路。 该系统包括图像捕获单元（14）和主机单元（12），其可以一起安装在一个或多个物理设备中或单独地安装。 图像捕获单元（14）包括图像处理器，图像缓冲器，光学单元，图像缓冲器和接口模块。 主机单元（12）包括主处理器，常规硬件和软件功能以及接口模块。 在捕获周期期间，图像捕获单元（14）重复地捕获来自编码目标（16）的图像。 当捕获周期完成时，图像捕获单元（14）尝试中断主机单元（12）。 主机单元（12）在可用时响应中断，通过通信链路接收多个编码图像，并对编码图像进行解码处理。

公开(公告)号：EP0846305A1

公开(公告)日：1998-06-10

申请号：EP97931314.0

申请日：1997-06-20

Applicant: NORAND CORPORATION

Inventor： DURBIN, Dennis, A. ,  RASMUSSEN, Jon

IPC: G06K7

CPC classification number: G06K7/1491 ,  G06K7/14

Abstract: A coded image capture and decoding system (10) includes an image capture (14) unit and a host unit (12) which operate to capture image data, generate a plurality of coded images, and, thereafter, to decode the plurality of coded images with a non-dedicated host processing circuitry. The system comprises an image capture unit (14) and a host unit (12) which may be installed together or separately in one or more physical devices. The image capture unit (14) includes an image processor, an image buffer, an optical unit, an image buffer and an interface module. The host unit (12) includes a host processor, conventional hardware and software functions, and an interface module. During a capture cycle, the image capture unit (14) repeatedly captures images from a coded target (16). When the capture cycle is complete, the image capture unit (14) attempts to interrupt the host unit (12). The host unit (12) responds to the interrupt when it is available, receives the plurality of coded images over a communication link, and performs decode processing of the coded images.