公开(公告)号：US10091888B2

公开(公告)日：2018-10-02

申请号：US15013093

申请日：2016-02-02

Applicant: Northrop Grumman Systems Corporation

Inventor： Xing Lan ,  Daniel R. Scherrer ,  Jesse B. Tice ,  Patrick J. Case ,  Xianglin Zeng

IPC: H05K3/00 ,  H03B5/12 ,  H03H1/00 ,  H01L21/48 ,  H01L23/538 ,  B05D5/12 ,  B05D1/12 ,  B41J2/01

Abstract: A method of manufacturing electronics using a nanoparticle ink printing method includes: synthesizing a phase change material (PCM) ink composition using hot injection to develop nanoparticles of the PCM; suspending the nanoparticles with a solvent; and printing a reconfigurable component using the PCM ink composition in additive manufacturing. Electronics includes: a substrate layer; an insulator layer printed on top of the substrate layer; a heater layer printed on top of the insulator layer; a barrier layer printed on top of one or more of the insulator layer and the heater layer; a phase change material (PCM) printed on top of the barrier layer; a connectivity layer printed on top of the PCM; and a passivation layer printed on top of one or more of the PCM and the connectivity layer.

公开(公告)号：US20210337638A1

公开(公告)日：2021-10-28

申请号：US16860642

申请日：2020-04-28

Applicant: Northrop Grumman Systems Corporation

Inventor： Elizabeth T. Kunkee ,  Dah-Weih Duan ,  Dino Ferizovic ,  Chunbo Zhang ,  Greta S. Tsai ,  Ming-Jong Shiau ,  Daniel R. Scherrer ,  Martn E. Roden

IPC: H05B6/68 ,  H05B6/80

Abstract: An exemplary semiconductor technology implemented microwave filter includes a dielectric substrate with metal traces on one surface that function as frequency selective circuits and reference ground. Other metal traces on the other surface of the substrate also provide reference ground. Bottom and top enclosures that enclose the substrate have respective interior recesses with deposited continuous metal coatings. A plurality of metal bonding bumps or bonding wall extends outwardly from the projecting walls of the bottom and top enclosures. The bonding bumps on the bottom and top enclosures engage reference ground metal traces on respective surfaces of the substrate. As a result of applied pressure, the bonding bumps and respective reference ground metal traces together with the through-substrate vias form a metal-to-metal singly-connected ground reference structure for the entire circuitry.

公开(公告)号：US20220408526A1

公开(公告)日：2022-12-22

申请号：US17896425

申请日：2022-08-26

Applicant: Northrop Grumman Systems Corporation

Inventor： Elizabeth T. Kunkee ,  Dah-Weih Duan ,  Dino Ferizovic ,  Chunbo Zhang ,  Greta S. Tsai ,  Ming-Jong Shiau ,  Daniel R. Scherrer ,  Martin E. Roden

IPC: H05B6/68 ,  H05B6/80

Abstract: An exemplary semiconductor technology implemented microwave filter includes a dielectric substrate with metal traces on one surface that function as frequency selective circuits and reference ground. A top enclosure encloses the substrate have respective interior recesses with deposited continuous metal coatings. A plurality of metal bonding bumps or bonding wall extends outwardly from the projecting walls of the bottom and top enclosures. The bonding bumps on the top enclosure engage reference ground metal traces on respective surface of the substrate. As a result of applied pressure, the bonding bumps and respective reference ground metal traces together with the through-substrate vias form a metal-to-metal singly-connected ground reference structure for the entire circuitry.

公开(公告)号：US20170223838A1

公开(公告)日：2017-08-03

申请号：US15013093

申请日：2016-02-02

Applicant: Northrop Grumman Systems Corporation

Inventor： Xing Lan ,  Daniel R. Scherrer ,  Jesse B. Tice ,  Patrick J. Case ,  Xianglin Zeng

IPC: H05K3/00 ,  H03B5/12 ,  H03H1/00

CPC classification number: H05K3/007 ,  B05D1/12 ,  B05D5/12 ,  B41J2/01 ,  H01L21/4867 ,  H01L23/5382 ,  H03B5/12 ,  H03B2200/0014 ,  H03H1/00 ,  H03H2001/0021 ,  H03H2210/03

Abstract: A method of manufacturing electronics using a nanoparticle ink printing method includes: synthesizing a phase change material (PCM) ink composition using hot injection to develop nanoparticles of the PCM; suspending the nanoparticles with a solvent; and printing a reconfigurable component using the PCM ink composition in additive manufacturing. Electronics includes: a substrate layer; an insulator layer printed on top of the substrate layer; a heater layer printed on top of the insulator layer; a barrier layer printed on top of one or more of the insulator layer and the heater layer; a phase change material (PCM) printed on top of the barrier layer; a connectivity layer printed on top of the PCM; and a passivation layer printed on top of one or more of the PCM and the connectivity layer.

公开(公告)号：US09287830B2

公开(公告)日：2016-03-15

申请号：US14458996

申请日：2014-08-13

Applicant: NORTHROP GRUMMAN SYSTEMS CORPORATION

Inventor： Daniel R. Scherrer

IPC: H03F3/45 ,  G05F1/00 ,  H03F1/02 ,  H03F3/193

CPC classification number: H03F1/0233 ,  H03F1/0283 ,  H03F1/22 ,  H03F1/30 ,  H03F3/193 ,  H03F3/45076 ,  H03F2200/451 ,  H03F2203/45116

Abstract: A RF amplifier circuit including a plurality of FET devices, where a source terminal of an FET device is electrically coupled to the drain terminal of another FET device. The circuit further includes a voltage divider network and a plurality of operational amplifiers, where a separate one of the operational amplifiers is provided for each FET device. Each operational amplifier includes a positive input terminal, a negative input terminal and an output terminal, where the output terminal for a particular operational amplifier is electrically coupled to a gate terminal of a particular FET device, the negative input terminal of each operational amplifier is electrically coupled to the source terminal of the particular FET device and the positive input terminal of each operational amplifier is electrically coupled to the voltage divider network. A source resistor is electrically coupled to the source terminal of a bottom FET device in the stack.

Abstract translation: 一种包括多个FET器件的RF放大器电路，其中FET器件的源极端子与另一个FET器件的漏极端子电耦合。 电路还包括分压器网络和多个运算放大器，其中为每个FET器件提供单独的一个运算放大器。 每个运算放大器包括正输入端，负输入端和输出端，其中特定运算放大器的输出端电耦合到特定FET器件的栅极端，每个运算放大器的负输入端电 耦合到特定FET器件的源极端子，并且每个运算放大器的正输入端子电耦合到分压器网络。 源极电阻器电耦合到堆叠中的底部FET器件的源极端子。

公开(公告)号：US20160049909A1

公开(公告)日：2016-02-18

申请号：US14458996

申请日：2014-08-13

Applicant: NORTHROP GRUMMAN SYSTEMS CORPORATION

Inventor： Daniel R. Scherrer

IPC: H03F1/02 ,  H03F3/45 ,  H03F3/193

CPC classification number: H03F1/0233 ,  H03F1/0283 ,  H03F1/22 ,  H03F1/30 ,  H03F3/193 ,  H03F3/45076 ,  H03F2200/451 ,  H03F2203/45116

Abstract: A RF amplifier circuit including a plurality of FET devices, where a source terminal of an FET device is electrically coupled to the drain terminal of another FET device. The circuit further includes a voltage divider network and a plurality of operational amplifiers, where a separate one of the operational amplifiers is provided for each FET device. Each operational amplifier includes a positive input terminal, a negative input terminal and an output terminal, where the output terminal for a particular operational amplifier is electrically coupled to a gate terminal of a particular FET device, the negative input terminal of each operational amplifier is electrically coupled to the source terminal of the particular FET device and the positive input terminal of each operational amplifier is electrically coupled to the voltage divider network. A source resistor is electrically coupled to the source terminal of a bottom FET device in the stack.

Abstract translation: 一种包括多个FET器件的RF放大器电路，其中FET器件的源极端子与另一个FET器件的漏极端子电耦合。 电路还包括分压器网络和多个运算放大器，其中为每个FET器件提供单独的一个运算放大器。 每个运算放大器包括正输入端，负输入端和输出端，其中特定运算放大器的输出端电耦合到特定FET器件的栅极端，每个运算放大器的负输入端电 耦合到特定FET器件的源极端子，并且每个运算放大器的正输入端子电耦合到分压器网络。 源极电阻器电耦合到堆叠中的底部FET器件的源极端子。