Self-aligned electrical interconnect for two assembled perpendicular semiconductor chips
    1.
    发明公开
    Self-aligned electrical interconnect for two assembled perpendicular semiconductor chips 审中-公开
    Selbstjustierte elektrische Verbindungfürzwei senkrecht zusammengesetzte Halbleiterchips

    公开(公告)号:EP1221428A2

    公开(公告)日:2002-07-10

    申请号:EP02250033.4

    申请日:2002-01-04

    Applicant: OpticNet, Inc.

    CPC classification number: B81B7/0006

    Abstract: A self-aligned electrical interconnect for two assembled perpendicular semiconductive chips is formed by a slot in a carrier chip having a notch with a metal trace. The other device chip is perpendicularly placed in the slot and has a matching metal trace. The chips are then bonded together by the traces to provide for fine perpendicular alignment of the assembled chips.

    Abstract translation: 用于两个组装的垂直半导体芯片的自对准电互连由具有金属迹线的凹口的载体芯片中的槽形成。 另一个器件芯片垂直放置在插槽中,并具有匹配的金属迹线。 然后通过迹线将芯片结合在一起以提供组装的芯片的精细垂直对准。

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