公开(公告)号：US20020085796A1

公开(公告)日：2002-07-04

申请号：US09754940

申请日：2001-01-04

Applicant: OpticNet, Inc.

Inventor： Martin Lim ,  Weijie Yun

IPC: G02B006/35

CPC classification number: B81B7/0006

Abstract: A self-aligned electrical interconnect for two assembled perpendicular semiconductive chips is formed by a slot in a carrier chip having a notch with a metal trace. The other device chip is perpendicularly placed in the slot and has a matching metal trace. The chips are then bonded together by the traces to provide for fine perpendicular alignment of the assembled chips.

Abstract translation: 用于两个组装的垂直半导体芯片的自对准电互连由具有金属迹线的凹口的载体芯片中的槽形成。 另一个器件芯片垂直放置在插槽中，并具有匹配的金属迹线。 然后通过迹线将芯片结合在一起，以提供组装的芯片的精细垂直对准。