公开(公告)号：AU2115895A

公开(公告)日：1995-09-25

申请号：AU2115895

申请日：1995-03-09

Applicant: PANDA PROJECT THE

Inventor： CRANE STANFORD W JR ,  PORTUONDO MARIA M

IPC: H01R33/76 ,  H01L23/12 ,  H01L23/32 ,  H01R12/50 ,  H01R13/26 ,  H05K3/34 ,  H05K7/10 ,  H01R23/68

公开(公告)号：AU2093895A

公开(公告)日：1995-09-25

申请号：AU2093895

申请日：1995-03-09

Applicant: PANDA PROJECT THE

Inventor： CRANE STANFORD W JR ,  PORTUONDO MARIA M

IPC: H05K1/18 ,  H01L23/498 ,  H05K1/11 ,  H05K3/30 ,  H05K3/32 ,  H05K3/34 ,  H05K3/46 ,  H01L21/00

Abstract: A semiconductor die package (30) includes a plurality of conductive leads (11) and a multi-layer structure (10) for carrying electrical signals, the multi-layer structure (10) including a plurality of layers of insulative material (12a-12d), each of the layers including a first surface and a second surface on an opposing side of the layer. Each of the leads (11) extends into a corresponding well (15) extending completely through at least one of the layers and bottoming at one of the surfaces of one of the layers through which the well (15) does not extend and is electrically coupled to an electrically conductive bonding structure (13) formed within its corresponding well (15).

公开(公告)号：AU2093795A

公开(公告)日：1995-09-25

申请号：AU2093795

申请日：1995-03-09

Applicant: PANDA PROJECT THE

Inventor： CRANE STANFORD W JR ,  PORTUONDO MARIA M ,  ERICKSON WILLARD ,  BIZZARRI MAURICE

IPC: G06F1/18 ,  G06F13/00 ,  G06F13/14 ,  G06F13/40 ,  G06F15/00 ,  G06F15/76 ,  G06F15/78 ,  H01R12/50 ,  H01R33/00 ,  H05K1/00 ,  H05K1/14 ,  H05K7/10 ,  H05K7/14 ,  H05K7/18 ,  H01L25/00

Abstract: A method of configuring a computer system architecture in which functionally compatible electronic components are located on modular printed circuit boards. Thus, a type of processor used by the system can be changed by replacing the printed circuit board incorporating the processor. Similarly, a type of peripheral bus used can be changed simply by replacing the printed circuit board containing the peripheral controller. High-density connectors connect the circuit boards. Some embodiments of the invention use a single backplane. Other embodiments place peripheral slots on a second, passive backplane.

公开(公告)号：AU6091596A

公开(公告)日：1996-12-30

申请号：AU6091596

申请日：1996-06-04

Applicant: PANDA PROJECT THE

Inventor： MOSLEY JOSEPH M ,  PORTUONDO MARIA M ,  TAYLOR DREW L

IPC: H01L23/50 ,  H01L23/057 ,  H01L23/498 ,  H05K1/18 ,  H05K3/34 ,  H01L23/495

Abstract: A semiconductor die carrier configured to be secured to a printed circuit board includes an insulative package for housing a semiconductor die. The insulative package has a top surface, a bottom surface, and a plurality of side surfaces coupling the top surface and the bottom surface. At least one row of electrically conductive leads extends from at least one of the side surfaces of the insulative package. Each of the leads has a proximal end, at least one horizontal portion extending in a horizontal direction, at least one vertical portion extending in a vertical direction, and a distal end. The distal ends of the leads are configured to be secured to the printed circuit board such that, when the distal ends of the leads are secured to the printed circuit board, at least a portion of the insulative package is located below an upper surface of the printed circuit board.

公开(公告)号：AU2115795A

公开(公告)日：1995-09-25

申请号：AU2115795

申请日：1995-03-09

Applicant: PANDA PROJECT THE

Inventor： CRANE STANFORD W JR ,  PORTUONDO MARIA M

IPC: H01L23/50 ,  H01L21/44 ,  H01L23/057 ,  H01L23/48 ,  H01L23/498 ,  H05K1/18 ,  H05K3/34

Abstract: A semiconductor die carrier includes a plurality of electrically insulative side walls; a plurality of electrically conductive leads extending from at least one of the side walls, each of the leads being individually manufactured without use of a lead frame; a semiconductor die positioned such that the electrically conductive leads are disposed at one or more locations around the periphery of the die; and structure for providing electrical connection between the semiconductor die and corresponding ones of the electrically conductive leads. A method of manufacturing a semiconductor die carrier includes the steps of individually manufacturing a plurality of electrically conductive leads without use of a lead frame; extending a plurality of the electrically conductive leads from at least one of a plurality of electrically insulative side walls; positioning a semiconductor die such that the electrically conductive leads are disposed at one or more locations around the periphery of the die; and electrically connecting the semiconductor die to corresponding ones of the electrically conductive leads.