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    1.
    发明专利
    未知

    公开(公告)号：DE50011528D1

    公开(公告)日：2005-12-15

    申请号：DE50011528

    申请日：2000-01-11

    Applicant: PHILIPS INTELLECTUAL PROPERTY

    Inventor： BUHR WOLFGANG

    IPC: G06F12/14 ,  G06F21/24 ,  G11C16/02 ,  H04L9/10

    Abstract: The circuit has a writable memory (1) for storing data to be protected against unauthorized access, and a readable memory for storing individualized data. A control mechanism generates defined control signals depending on a set of reset signals to be implemented by the control mechanism when the circuit is operating. A scrambling pattern generator generates scrambling pattern signals from the individualized data and control signals whilst implementing the reset signal sequence and outputting the scrambling pattern signals and scrambling logic (9).

    2.
    发明专利
    未知

    公开(公告)号：DE10254659A1

    公开(公告)日：2004-06-03

    申请号：DE10254659

    申请日：2002-11-22

    Applicant: PHILIPS INTELLECTUAL PROPERTY

    Inventor： GARBE JOACHIM ,  BUHR WOLFGANG

    IPC: G06F21/75 ,  G11C16/22 ,  G06F12/14

    Abstract: In order to further develop a circuit arrangement ( 100 ) for electronic data communication, comprising-at least a non-volatile memory module ( 10 ) for storing data, and-at least an interface logic ( 20 ) associated with the memory module ( 10 )-for addressing the memory module ( 10 ) and-for writing data to the memory module ( 10 ) or-for reading data from the memory module ( 10 ), together with a related method for registering light attacks on the non-volatile memory module ( 10 ), in such a way that, firstly, the light attack is recognized immediately and reliably regardless of whether an access, in particular a read access, to the memory module ( 10 ) is taking place or not and, secondly, the entire address space of the memory module ( 10 ) is covered as uniformly as possible in this regard, it is proposed that at least a monitoring arrangement ( 22 ) provided for monitoring the memory module ( 10 ) is associated with the interface logic ( 20 ), by means of which monitoring arrangement ( 22 ) an irradiation of the memory module ( 10 ) with at least a light source [so-called "light attack"] can be detected and/or registered and/or signaled in a test mode (T) in which no write or read access to the memory module ( 10 ) takes place.

    CIRCUIT ARRANGEMENT WITH NON-VOLATILE MEMORY MODULE AND METHOD FOR REGISTERING LIGHT-ATTACKS ON THE NON-VOLATILE MEMORY MODULE
    5.
    发明申请
    CIRCUIT ARRANGEMENT WITH NON-VOLATILE MEMORY MODULE AND METHOD FOR REGISTERING LIGHT-ATTACKS ON THE NON-VOLATILE MEMORY MODULE 审中-公开
    具有非易失性存储器模块的电路布置和在非易失性存储器模块上注册轻触发的方法

    公开(公告)号：WO2004049349A3

    公开(公告)日：2004-07-29

    申请号：PCT/IB0305148

    申请日：2003-11-13

    Applicant: PHILIPS INTELLECTUAL PROPERTY ,  KONINKL PHILIPS ELECTRONICS NV ,  GARBE JOACHIM CHRISTOPH HANS ,  BUHR WOLFGANG

    Inventor： GARBE JOACHIM CHRISTOPH HANS ,  BUHR WOLFGANG

    IPC: G06F21/75 ,  G11C16/22 ,  G06F12/14 ,  G06F21/00

    CPC classification number: G06F21/75 ,  G11C16/22

    Abstract: In order to further develop a circuit arrangement (100) for electronic data communication, comprising -at least a non-volatile memory module (10) for storing data, and -at least an interface logic (20) associated with the memory module (10) -for addressing the memory module (10) and-- for writing data to the memory module (10) or -for reading data from the memory module (10),together with a related method for registering light attacks on the non-volatile memory module (10), in such a way that, firstly, the light attack is recognized immediately and reliably regardless of whether an access, in particular a read access, to the memory module (10) is taking place or not and, secondly, the entire address space of the memory module (10) is covered as uniformly as possible in this regard, it is proposed that at least a monitoring arrangement (22) provided for monitoring the memory module (10) is associated with the interface logic (20), by means of which monitoring arrangement (22) an irradiation of the memory module (10) with at least a light source [so-called "light attack"] can be detected and/or registered and/or signaled in a test mode (T) in which no write or read access to the memory module (10) takes place.

    Abstract translation: 为了进一步开发用于电子数据通信的电路装置（100），包括至少一个用于存储数据的非易失性存储器模块（10），以及至少与存储器模块（10）相关联的接口逻辑（20） ） - 用于寻址存储器模块（10）， - 用于将数据写入存储器模块（10）或用于从存储器模块（10）读取数据，以及用于在非易失性存储器模块（10）上注册光攻击的相关方法 存储模块（10），首先，无论是否正在进行到存储模块（10）的访问，特别是读访问，都立即可靠地识别光攻击，其次， 在这方面，存储器模块（10）的整个地址空间被尽可能均匀地被覆盖，所以建议至少提供用于监视存储器模块（10）的监视装置（22）与接口逻辑（20 ），通过该监测装置（22）进行辐照 在具有至少一个光源[所谓的“光攻击”]的存储器模块（10）可以被检测和/或注册和/或以测试模式（T）发信号，其中不对 存储模块（10）发生。

    6.
    发明专利
    未知

    公开(公告)号：DE59711801D1

    公开(公告)日：2004-09-02

    申请号：DE59711801

    申请日：1997-08-19

    Applicant: PHILIPS INTELLECTUAL PROPERTY

    Inventor： BUHR WOLFGANG ,  HOERNER HELMUT

    IPC: H04L9/08 ,  E05B49/00 ,  G07C9/00

    Abstract: The method is used for key information transmitted from a central point to a remote point for recording on a data carrier, to allow replacement of a lost access key. Object information is transmitted from the remote point to the central point for read-out of the stored key information, which is encoded before transmission using a code which is stored at the central point and at the key and which must be used for decoding the received key information before it can be recorded on the data carrier.

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